commit 198ab640bbb0b8e1cdda518b7f8b348764e4402c
author Chris Lattner <sabre@nondot.org> Sun Dec 15 20:06:35 2002 +0000
committer Chris Lattner <sabre@nondot.org> Sun Dec 15 20:06:35 2002 +0000
tree 2c61a35e8207f90f9a2ff9d806ca42384147d7c8
parent c2db1a95df09e30f190e51be98ed34fcbbbb7aec

Simplify interfaces used by regalloc to insert code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index c7348d5..49a205a 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -199,7 +199,7 @@
   PhysReg = getFreeReg(VirtReg);
 
   // Add move instruction(s)
-  return RegInfo->loadRegOffset2Reg(&MBB, I, PhysReg,
+  return RegInfo->loadRegOffset2Reg(MBB, I, PhysReg,
                                     RegInfo->getFramePointer(),
                                     -stackOffset, regClass->getDataSize());
 }
@@ -215,7 +215,7 @@
   unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
 
   // Add move instruction(s)
-  return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg,
+  return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
                                      RegInfo->getFramePointer(),
                                      -stackOffset, regClass->getDataSize());
 }
@@ -231,7 +231,7 @@
   unsigned offset = allocateStackSpaceFor(PhysReg, regClass);
 
   // Add move instruction(s)
-  return RegInfo->storeReg2RegOffset(&MBB, I, PhysReg,
+  return RegInfo->storeReg2RegOffset(MBB, I, PhysReg,
                                      RegInfo->getFramePointer(),
                                      offset, regClass->getDataSize());
 }
@@ -293,7 +293,7 @@
       // Retrieve the constant value from this op, move it to target
       // register of the phi
       if (opVal.isImmediate()) {
-        opI = RegInfo->moveImm2Reg(&opBlock, opI, physReg,
+        opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
                                    (unsigned) opVal.getImmedValue(),
                                    dataSize);
         saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
@@ -384,10 +384,7 @@
     AllocateBasicBlock(*MBB);
 
   // add prologue we should preserve callee-save registers...
-  MachineFunction::iterator Fi = Fn.begin();
-  MachineBasicBlock *MBB = Fi;
-  MachineBasicBlock::iterator MBBi = MBB->begin();
-  RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
+  RegInfo->emitPrologue(Fn, NumBytesAllocated);
 
   const MachineInstrInfo &MII = TM.getInstrInfo();
 
@@ -400,7 +397,7 @@
     MachineInstr *MI = *--I;
     if (MII.isReturn(MI->getOpcode())) {
       // this block has a return instruction, add epilogue
-      RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
+      RegInfo->emitEpilogue(*MBB, NumBytesAllocated);
     }
   }