| commit | 19aa2b5015205456b42c426ff2559e9b930e285c | [log] [tgz] |
|---|---|---|
| author | Hal Finkel <hfinkel@anl.gov> | Sun Apr 01 20:08:17 2012 +0000 |
| committer | Hal Finkel <hfinkel@anl.gov> | Sun Apr 01 20:08:17 2012 +0000 |
| tree | 793ed3848a52f67804be5bf01264740368d5507f | |
| parent | 730acfb413849f05e9735145d6634c4429467ab7 [diff] [blame] |
Enable prefetch generation on PPC64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153851 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 3a6dbca..748486c 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -545,6 +545,9 @@ "dcbzl $dst", LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>, PPC970_DGroup_Single; +def : Pat<(prefetch xoaddr:$dst, (i32 0), imm, (i32 1)), + (DCBT xoaddr:$dst)>; + // Atomic operations let usesCustomInserter = 1 in { let Defs = [CR0] in {