| commit | 1a1932c83d6b6fcbf089eee3f97b65a23de22a92 | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Sun Jan 06 23:38:27 2008 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Sun Jan 06 23:38:27 2008 +0000 |
| tree | fa9d9d5b1ad73454fca5dd87fe5dd8b848b8bdc7 | |
| parent | 099688622c0d888df945cf4b3bc4c52ef414ef3b [diff] [blame] |
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index bc5e7f5..43313e2 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td
@@ -205,7 +205,7 @@ [], IIAlu>; // Memory Load/Store -let isLoad = 1, hasDelaySlot = 1 in +let isSimpleLoad = 1, hasDelaySlot = 1 in class LoadM<bits<6> op, string instr_asm, PatFrag OpNode>: FI< op, (outs CPURegs:$dst),