Move Blackfin intrinsics into the Target/Blackfin directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84194 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index 38ac4c2..e6d8007 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -474,4 +474,3 @@
include "llvm/IntrinsicsCellSPU.td"
include "llvm/IntrinsicsAlpha.td"
include "llvm/IntrinsicsXCore.td"
-include "llvm/IntrinsicsBlackfin.td"
diff --git a/include/llvm/IntrinsicsBlackfin.td b/include/llvm/IntrinsicsBlackfin.td
deleted file mode 100644
index 188e18c..0000000
--- a/include/llvm/IntrinsicsBlackfin.td
+++ /dev/null
@@ -1,34 +0,0 @@
-//===- IntrinsicsBlackfin.td - Defines Blackfin intrinsics -*- tablegen -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines all of the blackfin-specific intrinsics.
-//
-//===----------------------------------------------------------------------===//
-
-//===----------------------------------------------------------------------===//
-// Core synchronisation etc.
-//
-// These intrinsics have sideeffects. Each represent a single instruction, but
-// workarounds are sometimes required depending on the cpu.
-
-let TargetPrefix = "bfin" in {
-
- // Execute csync instruction with workarounds
- def int_bfin_csync : GCCBuiltin<"__builtin_bfin_csync">,
- Intrinsic<[llvm_void_ty]>;
-
- // Execute ssync instruction with workarounds
- def int_bfin_ssync : GCCBuiltin<"__builtin_bfin_ssync">,
- Intrinsic<[llvm_void_ty]>;
-
- // Execute idle instruction with workarounds
- def int_bfin_idle : GCCBuiltin<"__builtin_bfin_idle">,
- Intrinsic<[llvm_void_ty]>;
-
-}
diff --git a/lib/Target/Blackfin/Blackfin.td b/lib/Target/Blackfin/Blackfin.td
index b904638..cd90962 100644
--- a/lib/Target/Blackfin/Blackfin.td
+++ b/lib/Target/Blackfin/Blackfin.td
@@ -74,6 +74,7 @@
include "BlackfinRegisterInfo.td"
include "BlackfinCallingConv.td"
+include "BlackfinIntrinsics.td"
include "BlackfinInstrInfo.td"
def BlackfinInstrInfo : InstrInfo {}
diff --git a/lib/Target/Blackfin/BlackfinIntrinsicInfo.cpp b/lib/Target/Blackfin/BlackfinIntrinsicInfo.cpp
new file mode 100644
index 0000000..544dc68
--- /dev/null
+++ b/lib/Target/Blackfin/BlackfinIntrinsicInfo.cpp
@@ -0,0 +1,53 @@
+//===- BlackfinIntrinsicInfo.cpp - Intrinsic Information --------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the Blackfin implementation of TargetIntrinsicInfo.
+//
+//===----------------------------------------------------------------------===//
+
+#include "BlackfinIntrinsicInfo.h"
+#include "llvm/Intrinsics.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cstring>
+
+using namespace llvm;
+
+namespace bfinIntrinsic {
+
+ enum ID {
+ last_non_bfin_intrinsic = Intrinsic::num_intrinsics-1,
+#define GET_INTRINSIC_ENUM_VALUES
+#include "BlackfinGenIntrinsics.inc"
+#undef GET_INTRINSIC_ENUM_VALUES
+ , num_bfin_intrinsics
+ };
+
+}
+
+const char *BlackfinIntrinsicInfo::getName(unsigned IntrID) const {
+ static const char *const names[] = {
+#define GET_INTRINSIC_NAME_TABLE
+#include "BlackfinGenIntrinsics.inc"
+#undef GET_INTRINSIC_NAME_TABLE
+ };
+
+ if (IntrID < Intrinsic::num_intrinsics)
+ return 0;
+ assert(IntrID < bfinIntrinsic::num_bfin_intrinsics && "Invalid intrinsic ID");
+
+ return names[IntrID - Intrinsic::num_intrinsics];
+}
+
+unsigned
+BlackfinIntrinsicInfo::lookupName(const char *Name, unsigned Len) const {
+#define GET_FUNCTION_RECOGNIZER
+#include "BlackfinGenIntrinsics.inc"
+#undef GET_FUNCTION_RECOGNIZER
+ return 0;
+}
diff --git a/lib/Target/Blackfin/BlackfinIntrinsicInfo.h b/lib/Target/Blackfin/BlackfinIntrinsicInfo.h
new file mode 100644
index 0000000..3b59a60
--- /dev/null
+++ b/lib/Target/Blackfin/BlackfinIntrinsicInfo.h
@@ -0,0 +1,28 @@
+//===- BlackfinIntrinsicInfo.h - Blackfin Intrinsic Information -*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the Blackfin implementation of TargetIntrinsicInfo.
+//
+//===----------------------------------------------------------------------===//
+#ifndef BLACKFININTRINSICS_H
+#define BLACKFININTRINSICS_H
+
+#include "llvm/Target/TargetIntrinsicInfo.h"
+
+namespace llvm {
+
+ class BlackfinIntrinsicInfo : public TargetIntrinsicInfo {
+ public:
+ const char *getName(unsigned IntrID) const;
+ unsigned lookupName(const char *Name, unsigned Len) const;
+ };
+
+}
+
+#endif
diff --git a/lib/Target/Blackfin/BlackfinIntrinsics.td b/lib/Target/Blackfin/BlackfinIntrinsics.td
new file mode 100644
index 0000000..bf02cfe
--- /dev/null
+++ b/lib/Target/Blackfin/BlackfinIntrinsics.td
@@ -0,0 +1,34 @@
+//===- BlackfinIntrinsics.td - Defines Blackfin intrinsics -*- tablegen -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the blackfin-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+let TargetPrefix = "bfin", isTarget = 1 in {
+
+//===----------------------------------------------------------------------===//
+// Core synchronisation etc.
+//
+// These intrinsics have sideeffects. Each represent a single instruction, but
+// workarounds are sometimes required depending on the cpu.
+
+// Execute csync instruction with workarounds
+def int_bfin_csync : GCCBuiltin<"__builtin_bfin_csync">,
+ Intrinsic<[llvm_void_ty]>;
+
+// Execute ssync instruction with workarounds
+def int_bfin_ssync : GCCBuiltin<"__builtin_bfin_ssync">,
+ Intrinsic<[llvm_void_ty]>;
+
+// Execute idle instruction with workarounds
+def int_bfin_idle : GCCBuiltin<"__builtin_bfin_idle">,
+ Intrinsic<[llvm_void_ty]>;
+
+}
diff --git a/lib/Target/Blackfin/BlackfinTargetMachine.h b/lib/Target/Blackfin/BlackfinTargetMachine.h
index 73ed314..a14052b 100644
--- a/lib/Target/Blackfin/BlackfinTargetMachine.h
+++ b/lib/Target/Blackfin/BlackfinTargetMachine.h
@@ -20,6 +20,7 @@
#include "BlackfinInstrInfo.h"
#include "BlackfinSubtarget.h"
#include "BlackfinISelLowering.h"
+#include "BlackfinIntrinsicInfo.h"
namespace llvm {
@@ -29,6 +30,7 @@
BlackfinTargetLowering TLInfo;
BlackfinInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
+ BlackfinIntrinsicInfo IntrinsicInfo;
public:
BlackfinTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
@@ -47,6 +49,9 @@
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual bool addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel);
+ const TargetIntrinsicInfo *getIntrinsicInfo() const {
+ return &IntrinsicInfo;
+ }
};
} // end namespace llvm
diff --git a/lib/Target/Blackfin/CMakeLists.txt b/lib/Target/Blackfin/CMakeLists.txt
index 6c3b244..deb005d 100644
--- a/lib/Target/Blackfin/CMakeLists.txt
+++ b/lib/Target/Blackfin/CMakeLists.txt
@@ -9,9 +9,11 @@
tablegen(BlackfinGenDAGISel.inc -gen-dag-isel)
tablegen(BlackfinGenSubtarget.inc -gen-subtarget)
tablegen(BlackfinGenCallingConv.inc -gen-callingconv)
+tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic)
add_llvm_target(BlackfinCodeGen
BlackfinInstrInfo.cpp
+ BlackfinIntrinsicInfo.cpp
BlackfinISelDAGToDAG.cpp
BlackfinISelLowering.cpp
BlackfinMCAsmInfo.cpp
diff --git a/lib/Target/Blackfin/Makefile b/lib/Target/Blackfin/Makefile
index c0c1bce..c68760b 100644
--- a/lib/Target/Blackfin/Makefile
+++ b/lib/Target/Blackfin/Makefile
@@ -15,7 +15,7 @@
BlackfinGenRegisterInfo.inc BlackfinGenInstrNames.inc \
BlackfinGenInstrInfo.inc BlackfinGenAsmWriter.inc \
BlackfinGenDAGISel.inc BlackfinGenSubtarget.inc \
- BlackfinGenCallingConv.inc
+ BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc
DIRS = AsmPrinter TargetInfo
diff --git a/test/CodeGen/Blackfin/sync-intr.ll b/test/CodeGen/Blackfin/sync-intr.ll
index 75084f0..0b103a3 100644
--- a/test/CodeGen/Blackfin/sync-intr.ll
+++ b/test/CodeGen/Blackfin/sync-intr.ll
@@ -2,8 +2,11 @@
define void @f() nounwind {
entry:
+ ; CHECK-NOT: llvm.bfin
; CHECK: csync;
call void @llvm.bfin.csync()
+
+ ; CHECK-NOT: llvm.bfin
; CHECK: ssync;
call void @llvm.bfin.ssync()
ret void