commit 1b98919de35bee879f414e9b97b38eeb9df287bc
author Chris Lattner <sabre@nondot.org> Mon Dec 31 04:13:23 2007 +0000
committer Chris Lattner <sabre@nondot.org> Mon Dec 31 04:13:23 2007 +0000
tree 5686c82a5bfacdb56c5e7dabbf24990d70aac8d3
parent 888407cce69064cfc4de1581d3944ba74f308f74

Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelDAGToDAG.cpp

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index fa34323..8c5cd48 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -28,7 +28,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Compiler.h"
@@ -504,7 +504,7 @@
         for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
           if (I->getOperand(op).isRegister() && I->getOperand(op).isDef() &&
               MRegisterInfo::isVirtualRegister(I->getOperand(op).getReg()) &&
-              ((clas = RegMap->getRegClass(I->getOperand(0).getReg())) == 
+              ((clas = RegInfo->getRegClass(I->getOperand(0).getReg())) == 
                  X86::RFP32RegisterClass ||
                clas == X86::RFP64RegisterClass ||
                clas == X86::RFP80RegisterClass)) {
@@ -990,8 +990,8 @@
     // Insert the set of GlobalBaseReg into the first MBB of the function
     MachineBasicBlock &FirstMBB = BB->getParent()->front();
     MachineBasicBlock::iterator MBBI = FirstMBB.begin();
-    SSARegMap *RegMap = BB->getParent()->getSSARegMap();
-    unsigned PC = RegMap->createVirtualRegister(X86::GR32RegisterClass);
+    MachineRegisterInfo &RegInfo = BB->getParent()->getRegInfo();
+    unsigned PC = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
     
     const TargetInstrInfo *TII = TM.getInstrInfo();
     // Operand of MovePCtoStack is completely ignored by asm printer. It's
@@ -1003,7 +1003,7 @@
     // not to pc, but to _GLOBAL_ADDRESS_TABLE_ external
     if (TM.getRelocationModel() == Reloc::PIC_ &&
         Subtarget->isPICStyleGOT()) {
-      GlobalBaseReg = RegMap->createVirtualRegister(X86::GR32RegisterClass);
+      GlobalBaseReg = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
       BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg).
         addReg(PC).
         addExternalSymbol("_GLOBAL_OFFSET_TABLE_");