Simplify this code. The FastISel class has its own TD member.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56311 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 6e23fe7..6662910 100644
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -629,7 +629,7 @@
bool X86FastISel::X86SelectSelect(Instruction *I) {
const Type *Ty = I->getType();
if (isa<PointerType>(Ty))
- Ty = TLI.getTargetData()->getIntPtrType();
+ Ty = TD.getIntPtrType();
unsigned Opc = 0;
const TargetRegisterClass *RC = NULL;
@@ -1063,11 +1063,10 @@
}
// MachineConstantPool wants an explicit alignment.
- unsigned Align =
- TM.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
+ unsigned Align = TD.getPreferredTypeAlignmentShift(C->getType());
if (Align == 0) {
// Alignment of vector types. FIXME!
- Align = TM.getTargetData()->getABITypeSize(C->getType());
+ Align = TD.getABITypeSize(C->getType());
Align = Log2_64(Align);
}