[Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192054 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/SPARC/2011-01-11-CC.ll b/test/CodeGen/SPARC/2011-01-11-CC.ll
index 30f7134..0cb864a 100644
--- a/test/CodeGen/SPARC/2011-01-11-CC.ll
+++ b/test/CodeGen/SPARC/2011-01-11-CC.ll
@@ -1,5 +1,6 @@
; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9
+; RUN: llc -mtriple=sparc64-unknown-linux <%s | FileCheck %s -check-prefix=SPARC64
define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline {
@@ -157,6 +158,16 @@
; V9: subxcc
; V9: subxcc
+; SPARC64-LABEL: test_adde_sube
+; SPARC64: addcc
+; SPARC64: addxcc
+; SPARC64: addxcc
+; SPARC64: addxcc
+; SPARC64: subcc
+; SPARC64: subxcc
+; SPARC64: subxcc
+; SPARC64: subxcc
+
define void @test_adde_sube(i8* %a, i8* %b, i8* %sum, i8* %diff) {
entry: