lib/Target/Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index a713bc3..66d17cb 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -139,11 +139,13 @@
for (unsigned i = 0, e = OperandInfo.size(); i != e; ++i) {
Record *RC = OperandInfo[i];
// FIXME: We only care about register operands for now.
- if (RC && RC->isSubClassOf("RegisterClass")) {
- OS << "{ &" << getQualifiedName(RC) << "RegClass }, ";
- } else {
- OS << "{ 0 }, ";
- }
+ if (RC && RC->isSubClassOf("RegisterClass"))
+ OS << "{ &" << getQualifiedName(RC) << "RegClass, 0 }, ";
+ else if (RC && RC->getName() == "ptr_rc")
+ // Ptr value whose register class is resolved via callback.
+ OS << "{ 0, 1 }, ";
+ else
+ OS << "{ 0, 0 }, ";
}
OS << "};\n";
}