Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/Makefile.rules b/Makefile.rules
index 2acadd8..46a3f1b 100644
--- a/Makefile.rules
+++ b/Makefile.rules
@@ -1720,35 +1720,15 @@
# All of these files depend on tblgen and the .td files.
$(INCTMPFiles) : $(TBLGEN) $(TDFiles)
-$(TARGET:%=$(ObjDir)/%GenRegisterNames.inc.tmp): \
-$(ObjDir)/%GenRegisterNames.inc.tmp : %.td $(ObjDir)/.dir
- $(Echo) "Building $(<F) register names with tblgen"
- $(Verb) $(TableGen) -gen-register-enums -o $(call SYSPATH, $@) $<
-
-$(TARGET:%=$(ObjDir)/%GenRegisterDesc.inc.tmp): \
-$(ObjDir)/%GenRegisterDesc.inc.tmp : %.td $(ObjDir)/.dir
- $(Echo) "Building $(<F) register descriptions with tblgen"
- $(Verb) $(TableGen) -gen-register-desc -o $(call SYSPATH, $@) $<
-
-$(TARGET:%=$(ObjDir)/%GenRegisterInfo.h.inc.tmp): \
-$(ObjDir)/%GenRegisterInfo.h.inc.tmp : %.td $(ObjDir)/.dir
- $(Echo) "Building $(<F) register information header with tblgen"
- $(Verb) $(TableGen) -gen-register-info-header -o $(call SYSPATH, $@) $<
-
$(TARGET:%=$(ObjDir)/%GenRegisterInfo.inc.tmp): \
$(ObjDir)/%GenRegisterInfo.inc.tmp : %.td $(ObjDir)/.dir
$(Echo) "Building $(<F) register info implementation with tblgen"
$(Verb) $(TableGen) -gen-register-info -o $(call SYSPATH, $@) $<
-$(TARGET:%=$(ObjDir)/%GenInstrNames.inc.tmp): \
-$(ObjDir)/%GenInstrNames.inc.tmp : %.td $(ObjDir)/.dir
- $(Echo) "Building $(<F) instruction names with tblgen"
- $(Verb) $(TableGen) -gen-instr-enums -o $(call SYSPATH, $@) $<
-
$(TARGET:%=$(ObjDir)/%GenInstrInfo.inc.tmp): \
$(ObjDir)/%GenInstrInfo.inc.tmp : %.td $(ObjDir)/.dir
$(Echo) "Building $(<F) instruction information with tblgen"
- $(Verb) $(TableGen) -gen-instr-desc -o $(call SYSPATH, $@) $<
+ $(Verb) $(TableGen) -gen-instr-info -o $(call SYSPATH, $@) $<
$(TARGET:%=$(ObjDir)/%GenAsmWriter.inc.tmp): \
$(ObjDir)/%GenAsmWriter.inc.tmp : %.td $(ObjDir)/.dir