commit 243fcc5a6901e75e7ca5c374e706a634593ec17f
author Bob Wilson <bob.wilson@apple.com> Tue Sep 01 04:26:28 2009 +0000
committer Bob Wilson <bob.wilson@apple.com> Tue Sep 01 04:26:28 2009 +0000
tree da423aa0f4ac68bc98b50d36b11a6db7aff0de41
parent 71124f698befddb89309758f4aa171e11b9beff3

Generate code for vld{234}_lane intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80656 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/NEONPreAllocPass.cpp

diff --git a/lib/Target/ARM/NEONPreAllocPass.cpp b/lib/Target/ARM/NEONPreAllocPass.cpp
index f1f3b31..6938013 100644
--- a/lib/Target/ARM/NEONPreAllocPass.cpp
+++ b/lib/Target/ARM/NEONPreAllocPass.cpp
@@ -45,6 +45,9 @@
   case ARM::VLD2d8:
   case ARM::VLD2d16:
   case ARM::VLD2d32:
+  case ARM::VLD2LNd8:
+  case ARM::VLD2LNd16:
+  case ARM::VLD2LNd32:
     FirstOpnd = 0;
     NumRegs = 2;
     return true;
@@ -52,6 +55,9 @@
   case ARM::VLD3d8:
   case ARM::VLD3d16:
   case ARM::VLD3d32:
+  case ARM::VLD3LNd8:
+  case ARM::VLD3LNd16:
+  case ARM::VLD3LNd32:
     FirstOpnd = 0;
     NumRegs = 3;
     return true;
@@ -59,6 +65,9 @@
   case ARM::VLD4d8:
   case ARM::VLD4d16:
   case ARM::VLD4d32:
+  case ARM::VLD4LNd8:
+  case ARM::VLD4LNd16:
+  case ARM::VLD4LNd32:
     FirstOpnd = 0;
     NumRegs = 4;
     return true;