Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15710 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 2ccfb46..1304958 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -123,6 +123,7 @@
def MFCTR : XFXForm_1_ext<"mfctr", 31, 399, 9, 0, 0>;
def MTLR : XFXForm_7_ext<"mtlr", 31, 467, 8, 0, 0>;
def MTCTR : XFXForm_7_ext<"mtctr", 31, 467, 9, 0, 0>;
+def MULLD : XOForm_1<"mulld", 31, 233, 0, 0, 1, 0>;
def MULLW : XOForm_1<"mullw", 31, 235, 0, 0, 0, 0>;
def MULHWU : XOForm_2<"mulhwu", 31, 11, 0, 0, 0>;
def NAND : XForm_6<"nand", 31, 476, 0, 0, 0>;
@@ -133,13 +134,19 @@
def ORIS : DForm_4<"oris", 25, 0, 0>;
def OR : XForm_6<"or", 31, 444, 0, 0, 0>;
def ORo : XForm_6<"or.", 31, 444, 1, 0, 0>;
+def RLDICL : MDForm_1<"rldicl", 30, 0, 0, 1, 0>;
+def RLDICR : MDForm_1<"rldicr", 30, 1, 0, 1, 0>;
def RLWINM : MForm_2<"rlwinm", 21, 0, 0, 0>;
def RLWNM : MForm_1<"rlwnm", 23, 0, 0, 0>;
def RLWIMI : MForm_2<"rlwimi", 20, 0, 0, 0>;
+def SLD : XForm_6<"sld", 31, 27, 0, 1, 0>;
def SLW : XForm_6<"slw", 31, 24, 0, 0, 0>;
-def SRW : XForm_6<"srw", 31, 24, 0, 0, 0>;
+def SRD : XForm_6<"srd", 31, 539, 0, 1, 0>;
+def SRW : XForm_6<"srw", 31, 536, 0, 0, 0>;
+def SRADI : XSForm_1<"sradi", 31, 413, 0, 1, 0>;
def SRAWI : XForm_10<"srawi", 31, 824, 0, 0, 0>;
-def SRAW : XForm_6<"sraw", 31, 280, 0, 0, 0>;
+def SRAD : XForm_6<"srad", 31, 794, 0, 1, 0>;
+def SRAW : XForm_6<"sraw", 31, 792, 0, 0, 0>;
def STB : DForm_3<"stb", 38, 0, 0>;
def STBU : DForm_3<"stbu", 39, 0, 0>;
def STBX : XForm_8<"stbx", 31, 215, 0, 0>;