commit 24fd0ddf3136ad7dec6c554f3a97f2d24fe2027f
author Craig Topper <craig.topper@gmail.com> Mon Jul 30 05:39:34 2012 +0000
committer Craig Topper <craig.topper@gmail.com> Mon Jul 30 05:39:34 2012 +0000
tree bfd9a1e758de62c0041b1bf5df6708f0f9d8ba84
parent 50c5c8275e576c2129a4ab6146ca4226dcdfe6fe

Remove check for sub class of X86Inst from filter function since caller guaranteed it. Replace another sub class check with ShouldBeEmitted flag since it was factored in there already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160949 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/X86RecognizableInstr.cpp

diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index e05ab4a..d2847a9 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -394,8 +394,7 @@
 
   // Filter out intrinsics
 
-  if (!Rec->isSubClassOf("X86Inst"))
-    return FILTER_STRONG;
+  assert(Rec->isSubClassOf("X86Inst") && "Can only filter X86 instructions");
 
   if (Form == X86Local::Pseudo ||
       (IsCodeGenOnly && Name.find("_REV") == Name.npos))
@@ -544,7 +543,7 @@
 void RecognizableInstr::emitInstructionSpecifier(DisassemblerTables &tables) {
   Spec->name       = Name;
 
-  if (!Rec->isSubClassOf("X86Inst"))
+  if (!ShouldBeEmitted)
     return;
 
   switch (filter()) {
@@ -587,9 +586,6 @@
     }
   }
 
-  if (!ShouldBeEmitted)
-    return;
-
 #define HANDLE_OPERAND(class)               \
   handleOperand(false,                      \
                 operandIndex,               \