Do not use $gp as a dedicated global register if the target ABI is not O32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155522 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/Mips/2010-07-20-Switch.ll b/test/CodeGen/Mips/2010-07-20-Switch.ll
index aaf6767..a9f1d0b 100644
--- a/test/CodeGen/Mips/2010-07-20-Switch.ll
+++ b/test/CodeGen/Mips/2010-07-20-Switch.ll
@@ -15,10 +15,11 @@
; PIC-O32: sll ${{[0-9]+}}, ${{[0-9]+}}, 2
; PIC-O32: addu $[[R1:[0-9]+]], ${{[0-9]+}}, $gp
; PIC-O32: jr $[[R1]]
+; PIC-N64: daddiu $[[R2:[0-9]+]], ${{[0-9]+}}, %lo(%neg(%gp_rel(main)))
; PIC-N64: ld $[[R0:[0-9]+]], %got_page($JTI0_0)
; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst($JTI0_0)
; PIC-N64: dsll ${{[0-9]+}}, ${{[0-9]+}}, 3
-; PIC-N64: daddu $[[R1:[0-9]+]], ${{[0-9]+}}, $gp
+; PIC-N64: daddu $[[R1:[0-9]+]], ${{[0-9]+}}, $[[R2]]
; PIC-N64: jr $[[R1]]
switch i32 %0, label %bb4 [
i32 0, label %bb5
diff --git a/test/CodeGen/Mips/cmov.ll b/test/CodeGen/Mips/cmov.ll
index 03254a9..86bf337 100755
--- a/test/CodeGen/Mips/cmov.ll
+++ b/test/CodeGen/Mips/cmov.ll
@@ -7,8 +7,8 @@
; O32: lw ${{[0-9]+}}, %got(i3)($gp)
; O32: addiu ${{[0-9]+}}, $gp, %got(i1)
-; N64: ld ${{[0-9]+}}, %got_disp(i3)($gp)
-; N64: daddiu ${{[0-9]+}}, $gp, %got_disp(i1)
+; N64: ld ${{[0-9]+}}, %got_disp(i3)
+; N64: daddiu ${{[0-9]+}}, ${{[0-9]+}}, %got_disp(i1)
define i32* @cmov1(i32 %s) nounwind readonly {
entry:
%tobool = icmp ne i32 %s, 0
@@ -25,8 +25,8 @@
; O32: addiu $[[R0:[0-9]+]], $gp, %got(c)
; O32: movn $[[R1]], $[[R0]], ${{[0-9]+}}
; N64: cmov2:
-; N64: daddiu $[[R1:[0-9]+]], $gp, %got_disp(d)
-; N64: daddiu $[[R0:[0-9]+]], $gp, %got_disp(c)
+; N64: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
+; N64: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got_disp(c)
; N64: movn $[[R1]], $[[R0]], ${{[0-9]+}}
define i32 @cmov2(i32 %s) nounwind readonly {
entry: