Simplify RegAllocGreedy's use of register aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121807 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index 1c58bbe..5d2cc99 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -154,11 +154,8 @@
// Check interference without using the cache.
bool RAGreedy::checkUncachedInterference(LiveInterval &VirtReg,
unsigned PhysReg) {
- LiveIntervalUnion::Query subQ(&VirtReg, &PhysReg2LiveUnion[PhysReg]);
- if (subQ.checkInterference())
- return true;
- for (const unsigned *AliasI = TRI->getAliasSet(PhysReg); *AliasI; ++AliasI) {
- subQ.init(&VirtReg, &PhysReg2LiveUnion[*AliasI]);
+ for (const unsigned *AliasI = TRI->getOverlaps(PhysReg); *AliasI; ++AliasI) {
+ LiveIntervalUnion::Query subQ(&VirtReg, &PhysReg2LiveUnion[*AliasI]);
if (subQ.checkInterference())
return true;
}
@@ -170,19 +167,9 @@
/// interfering.
LiveInterval *RAGreedy::getSingleInterference(LiveInterval &VirtReg,
unsigned PhysReg) {
+ // Check physreg and aliases.
LiveInterval *Interference = 0;
-
- // Check direct interferences.
- LiveIntervalUnion::Query &Q = query(VirtReg, PhysReg);
- if (Q.checkInterference()) {
- Q.collectInterferingVRegs(1);
- if (!Q.seenAllInterferences())
- return 0;
- Interference = Q.interferingVRegs().front();
- }
-
- // Check aliases.
- for (const unsigned *AliasI = TRI->getAliasSet(PhysReg); *AliasI; ++AliasI) {
+ for (const unsigned *AliasI = TRI->getOverlaps(PhysReg); *AliasI; ++AliasI) {
LiveIntervalUnion::Query &Q = query(VirtReg, *AliasI);
if (Q.checkInterference()) {
if (Interference)