* Fix 80-column violations
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index c874675..60cc49a 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -24,14 +24,14 @@
class X86Subtarget : public TargetSubtarget {
protected:
enum X86SSEEnum {
- NoMMXSSE, MMX, SSE, SSE2, SSE3
+ NoMMXSSE, MMX, SSE1, SSE2, SSE3
};
enum X863DNowEnum {
NoThreeDNow, ThreeDNow, ThreeDNowA
};
- /// X86SSELevel - MMX, SSE, SSE2, SSE3, or none supported.
+ /// X86SSELevel - MMX, SSE1, SSE2, SSE3, or none supported.
X86SSEEnum X86SSELevel;
/// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
@@ -76,7 +76,7 @@
bool is64Bit() const { return Is64Bit; }
bool hasMMX() const { return X86SSELevel >= MMX; }
- bool hasSSE() const { return X86SSELevel >= SSE; }
+ bool hasSSE1() const { return X86SSELevel >= SSE1; }
bool hasSSE2() const { return X86SSELevel >= SSE2; }
bool hasSSE3() const { return X86SSELevel >= SSE3; }
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }