commit 25dae8f4a30634c1f9cd483b13995ecf44fecec6
author Akira Hatanaka <ahatanaka@mips.com> Tue Jan 24 23:18:43 2012 +0000
committer Akira Hatanaka <ahatanaka@mips.com> Tue Jan 24 23:18:43 2012 +0000
tree cab4cea5c9602f555bb582efb61499b631fc8b62
parent 08067b26f7fd0e8e3c4141c5a48da32af616a760

Sign-extend 32-bit integer arguments when they are passed in 64-bit registers,
which is what N32/64 does.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148875 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsISelLowering.cpp

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 96b297c..2f366b3 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2299,7 +2299,10 @@
       Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, LocVT, Arg);
       break;
     case CCValAssign::AExt:
-      Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
+      if (ValVT == MVT::i32)
+        Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, LocVT, Arg);
+      else
+        Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
       break;
     }