Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 55bbba7..0a5b181 100644
--- a/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -111,7 +111,6 @@
if (!DisableHardwareLoops) {
PM->add(createHexagonHardwareLoops());
}
-
return false;
}
@@ -138,5 +137,8 @@
// Split up TFRcondsets into conditional transfers.
PM->add(createHexagonSplitTFRCondSets(getHexagonTargetMachine()));
+ // Create Packets.
+ PM->add(createHexagonPacketizer());
+
return false;
}