commit 2755896fd048d189bedc5e99e776b3eca010dd4e
author Devang Patel <dpatel@apple.com> Tue Dec 23 21:55:04 2008 +0000
committer Devang Patel <dpatel@apple.com> Tue Dec 23 21:55:04 2008 +0000
tree ceb7fe42ae61701422b3349e15abb9c4fcca166a
parent 0b1d4a798d1dd2f39521b6b381cd1c1911c9ab52

Silience unused warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61390 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 7dc9890..5e5290c 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -122,7 +122,9 @@
 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
   const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtualReg);
   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
+#ifndef NDEBUG
   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
+#endif
 
   while (1) {
     unsigned regIdx = RegClassIdx[RC]++;