Clean up some Release build warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147289 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Hexagon/HexagonInstrInfo.cpp b/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 69a50d7..ae42da7 100644
--- a/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -461,7 +461,7 @@
} else if (VT == MVT::i64) {
TRC = Hexagon::DoubleRegsRegisterClass;
} else {
- assert(0 && "Cannot handle this register class");
+ llvm_unreachable("Cannot handle this register class");
}
unsigned NewReg = RegInfo.createVirtualRegister(TRC);
@@ -553,10 +553,6 @@
case Hexagon::JMPR:
return false;
- return true;
-
- default:
- return true;
}
return true;
@@ -793,9 +789,8 @@
case Hexagon::DEALLOC_RET_V4:
return !invertPredicate ? Hexagon::DEALLOC_RET_cPt_V4 :
Hexagon::DEALLOC_RET_cNotPt_V4;
- default:
- assert(false && "Unexpected predicable instruction");
}
+ llvm_unreachable("Unexpected predicable instruction");
}
@@ -1243,8 +1238,8 @@
return true;
}
- assert(0 && "No offset range is defined for this opcode. Please define it in \
- the above switch statement!");
+ llvm_unreachable("No offset range is defined for this opcode. "
+ "Please define it in the above switch statement!");
}