Simplify my (il)logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43819 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 929b1e7..5c46978 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -316,6 +316,7 @@
if (!mop.isRegister())
continue;
unsigned Reg = mop.getReg();
+ unsigned RegI = Reg;
if (Reg == 0 || MRegisterInfo::isPhysicalRegister(Reg))
continue;
bool isSubReg = RegMap->isSubRegister(Reg);
@@ -381,17 +382,7 @@
unsigned RegJ = MI->getOperand(j).getReg();
if (RegJ == 0 || MRegisterInfo::isPhysicalRegister(RegJ))
continue;
- bool isSubRegJ = RegMap->isSubRegister(RegJ);
- if (isSubRegJ) {
- assert(!isSubReg || RegMap->getSubRegisterIndex(RegJ) == SubIdx);
- RegJ = RegMap->getSuperRegister(RegJ);
- }
- // Important to check "isSubRegJ == isSubReg".
- // e.g. %reg1024 = MOVSX32rr16 %reg1025. It's possible that both
- // registers are coalesced to the same register but only %reg1025 is
- // a sub-register use. They should not be rewritten to the same
- // register.
- if (RegJ == li.reg && isSubRegJ == isSubReg) {
+ if (RegJ == RegI) {
MI->getOperand(j).setReg(NewVReg);
HasUse |= MI->getOperand(j).isUse();
HasDef |= MI->getOperand(j).isDef();