Batch 4 of Mips CodeGen tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54509 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
new file mode 100644
index 0000000..872f65d
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
+; RUN: grep seh %t | count 1
+; RUN: grep seb %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i8 @A(i8 %e.0, i8 signext %sum) signext nounwind {
+entry:
+ add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
+ ret i8 %0
+}
+
+define i16 @B(i16 %e.0, i16 signext %sum) signext nounwind {
+entry:
+ add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
+ ret i16 %0
+}
+
diff --git a/test/CodeGen/Mips/2008-07-22-Cstpool.ll b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
new file mode 100644
index 0000000..770cc69
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-22-Cstpool.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
+; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2
+; RUN: grep {rodata.cst4,"aM",@progbits} %t | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @F(float %a) nounwind {
+entry:
+ add float %a, 0x4011333340000000 ; <float>:0 [#uses=1]
+ add float %0, 0x4010666660000000 ; <float>:1 [#uses=1]
+ ret float %1
+}
diff --git a/test/CodeGen/Mips/2008-07-23-fpcmp.ll b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
new file mode 100644
index 0000000..3fcec16
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-23-fpcmp.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
+; RUN: grep {c\\..*\\.s} %t | count 3
+; RUN: grep {bc1\[tf\]} %t | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %a, float %b) nounwind {
+entry:
+ fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb, label %bb2
+
+bb: ; preds = %entry
+ add float %a, 1.000000e+00 ; <float>:1 [#uses=1]
+ ret float %1
+
+bb2: ; preds = %entry
+ ret float %b
+}
+
+define float @B(float %a, float %b) nounwind {
+entry:
+ fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
+ %.0 = select i1 %0, float %a, float %b ; <float> [#uses=1]
+ ret float %.0
+}
+
+define i32 @C(i32 %a, i32 %b, float %j) nounwind {
+entry:
+ fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
+ %.0 = select i1 %0, i32 %a, i32 %b ; <i32> [#uses=1]
+ ret i32 %.0
+}
+