Rename reloads/spills to loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11619 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 6791220..a1d9a11 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -31,8 +31,8 @@
using namespace llvm;
namespace {
- Statistic<> numSpilled ("ra-linearscan", "Number of registers spilled");
- Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
+ Statistic<> numStores("ra-linearscan", "Number of stores added");
+ Statistic<> numLoads ("ra-linearscan", "Number of loads added");
class PhysRegTracker {
private:
@@ -650,7 +650,7 @@
DEBUG(std::cerr << "add store for reg" << li->reg << " to "
"stack slot " << slot << " after: ";
mi->print(std::cerr, *tm_));
- ++numSpilled;
+ ++numStores;
mri_->storeRegToStackSlot(*mi->getParent(),
next(mi), li->reg, slot, rc);
}
@@ -666,7 +666,7 @@
DEBUG(std::cerr << "add load for reg" << li->reg
<< " from stack slot " << slot << " before: ";
mi->print(std::cerr, *tm_));
- ++numReloaded;
+ ++numLoads;
mri_->loadRegFromStackSlot(*mi->getParent(),
mi, li->reg, slot, rc);
}
@@ -687,7 +687,7 @@
DEBUG(std::cerr << "add store for reg" << li->reg << " to "
"stack slot " << slot << " after: ";
mi->print(std::cerr, *tm_));
- ++numSpilled;
+ ++numStores;
mri_->storeRegToStackSlot(*mi->getParent(),
next(mi), li->reg, slot, rc);
}
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index b533bc8..cbbc7c2 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -28,9 +28,9 @@
using namespace llvm;
namespace {
- Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
- Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
- Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
+ Statistic<> NumStores("ra-local", "Number of stores added");
+ Statistic<> NumLoads ("ra-local", "Number of loads added");
+ Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
class RA : public MachineFunctionPass {
const TargetMachine *TM;
MachineFunction *MF;
@@ -275,7 +275,7 @@
int FrameIndex = getStackSpaceFor(VirtReg, RC);
DEBUG(std::cerr << " to stack slot #" << FrameIndex);
RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
- ++NumSpilled; // Update statistics
+ ++NumStores; // Update statistics
}
getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
@@ -512,7 +512,7 @@
// Add move instruction(s)
RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
- ++NumReloaded; // Update statistics
+ ++NumLoads; // Update statistics
MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
return MI;
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index b1726ef..68f09d0 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -28,8 +28,8 @@
using namespace llvm;
namespace {
- Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
- Statistic<> NumReloaded("ra-simple", "Number of registers reloaded");
+ Statistic<> NumStores("ra-simple", "Number of stores added");
+ Statistic<> NumLoads ("ra-simple", "Number of loads added");
class RegAllocSimple : public MachineFunctionPass {
MachineFunction *MF;
@@ -130,7 +130,7 @@
unsigned PhysReg = getFreeReg(VirtReg);
// Add move instruction(s)
- ++NumReloaded;
+ ++NumLoads;
RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
return PhysReg;
}
@@ -142,7 +142,7 @@
int FrameIdx = getStackSpaceFor(VirtReg, RC);
// Add move instruction(s)
- ++NumSpilled;
+ ++NumStores;
RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
}