diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 60925f3..9368540 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -25,6 +25,10 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+namespace llvm {
+  bool EnableFastISel;
+}
+
 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
@@ -49,6 +53,11 @@
                        cl::desc("Disable scheduling after register allocation"),
                        cl::init(true));
 
+static cl::opt<bool, true>
+FastISelOption("fast-isel", cl::Hidden,
+               cl::desc("Enable the experimental \"fast\" instruction selector"),
+               cl::location(EnableFastISel));
+
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
                                        raw_ostream &Out,
@@ -168,6 +177,10 @@
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
+  // If we're using Fast-ISel, clean up the mess.
+  if (EnableFastISel)
+    PM.add(createDeadMachineInstructionElimPass());
+
   if (EnableLICM)
     PM.add(createMachineLICMPass());
 
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index afb290d..9e12a27 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -56,9 +56,6 @@
 static cl::opt<bool>
 EnableLegalizeTypes("enable-legalize-types", cl::Hidden);
 static cl::opt<bool>
-EnableFastISel("fast-isel", cl::Hidden,
-          cl::desc("Enable the experimental \"fast\" instruction selector"));
-static cl::opt<bool>
 EnableFastISelVerbose("fast-isel-verbose", cl::Hidden,
           cl::desc("Enable verbose messages in the experimental \"fast\" "
                    "instruction selector"));