Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/DAGISelMatcher.cpp b/utils/TableGen/DAGISelMatcher.cpp
index 1367e8d..bd77907 100644
--- a/utils/TableGen/DAGISelMatcher.cpp
+++ b/utils/TableGen/DAGISelMatcher.cpp
@@ -15,6 +15,8 @@
#include "llvm/ADT/StringExtras.h"
using namespace llvm;
+void Matcher::anchor() { }
+
void Matcher::dump() const {
print(errs(), 0);
}
@@ -324,6 +326,10 @@
}
+void EmitNodeMatcher::anchor() { }
+
+void MorphNodeToMatcher::anchor() { }
+
unsigned MarkGlueResultsMatcher::getHashImpl() const {
return HashUnsigneds(GlueResultNodes.begin(), GlueResultNodes.end());
}
diff --git a/utils/TableGen/DAGISelMatcher.h b/utils/TableGen/DAGISelMatcher.h
index dcb8da7..99ebf98 100644
--- a/utils/TableGen/DAGISelMatcher.h
+++ b/utils/TableGen/DAGISelMatcher.h
@@ -41,6 +41,7 @@
// The next matcher node that is executed after this one. Null if this is the
// last stage of a match.
OwningPtr<Matcher> Next;
+ virtual void anchor();
public:
enum KindTy {
// Matcher state manipulation.
@@ -1011,6 +1012,7 @@
/// EmitNodeMatcher - This signals a successful match and generates a node.
class EmitNodeMatcher : public EmitNodeMatcherCommon {
+ virtual void anchor();
unsigned FirstResultSlot;
public:
EmitNodeMatcher(const std::string &opcodeName,
@@ -1033,6 +1035,7 @@
};
class MorphNodeToMatcher : public EmitNodeMatcherCommon {
+ virtual void anchor();
const PatternToMatch &Pattern;
public:
MorphNodeToMatcher(const std::string &opcodeName,
diff --git a/utils/TableGen/SetTheory.cpp b/utils/TableGen/SetTheory.cpp
index bef73f3..838b924 100644
--- a/utils/TableGen/SetTheory.cpp
+++ b/utils/TableGen/SetTheory.cpp
@@ -198,6 +198,10 @@
};
} // end anonymous namespace
+void SetTheory::Operator::anchor() { }
+
+void SetTheory::Expander::anchor() { }
+
SetTheory::SetTheory() {
addOperator("add", new AddOp);
addOperator("sub", new SubOp);
diff --git a/utils/TableGen/SetTheory.h b/utils/TableGen/SetTheory.h
index 6e8313b..b394058 100644
--- a/utils/TableGen/SetTheory.h
+++ b/utils/TableGen/SetTheory.h
@@ -65,7 +65,9 @@
typedef SmallSetVector<Record*, 16> RecSet;
/// Operator - A callback representing a DAG operator.
- struct Operator {
+ class Operator {
+ virtual void anchor();
+ public:
virtual ~Operator() {}
/// apply - Apply this operator to Expr's arguments and insert the result
@@ -76,7 +78,9 @@
/// Expander - A callback function that can transform a Record representing a
/// set into a fully expanded list of elements. Expanders provide a way for
/// users to define named sets that can be used in DAG expressions.
- struct Expander {
+ class Expander {
+ virtual void anchor();
+ public:
virtual ~Expander() {}
virtual void expand(SetTheory&, Record*, RecSet &Elts) =0;
diff --git a/utils/TableGen/TGValueTypes.cpp b/utils/TableGen/TGValueTypes.cpp
index af0d9f4..acb9985 100644
--- a/utils/TableGen/TGValueTypes.cpp
+++ b/utils/TableGen/TGValueTypes.cpp
@@ -18,6 +18,9 @@
#include <map>
using namespace llvm;
+#pragma clang diagnostic push
+#pragma clang diagnostic ignored "-Wweak-vtables"
+
namespace llvm {
class Type {
@@ -58,6 +61,8 @@
}
};
+#pragma clang diagnostic pop
+
static std::map<unsigned, const Type *>
ExtendedIntegerTypeMap;
static std::map<std::pair<uintptr_t, uintptr_t>, const Type *>
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 3899a41..2b1c89d 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -101,92 +101,92 @@
cl::opt<std::string>
Class("class", cl::desc("Print Enum list for this class"),
- cl::value_desc("class name"));
-}
-
-class LLVMTableGenAction : public TableGenAction {
-public:
- bool operator()(raw_ostream &OS, RecordKeeper &Records) {
- switch (Action) {
- case PrintRecords:
- OS << Records; // No argument, dump all contents
- break;
- case GenEmitter:
- CodeEmitterGen(Records).run(OS);
- break;
- case GenRegisterInfo:
- RegisterInfoEmitter(Records).run(OS);
- break;
- case GenInstrInfo:
- InstrInfoEmitter(Records).run(OS);
- break;
- case GenCallingConv:
- CallingConvEmitter(Records).run(OS);
- break;
- case GenAsmWriter:
- AsmWriterEmitter(Records).run(OS);
- break;
- case GenAsmMatcher:
- AsmMatcherEmitter(Records).run(OS);
- break;
- case GenDisassembler:
- DisassemblerEmitter(Records).run(OS);
- break;
- case GenPseudoLowering:
- PseudoLoweringEmitter(Records).run(OS);
- break;
- case GenDAGISel:
- DAGISelEmitter(Records).run(OS);
- break;
- case GenDFAPacketizer:
- DFAGen(Records).run(OS);
- break;
- case GenFastISel:
- FastISelEmitter(Records).run(OS);
- break;
- case GenSubtarget:
- SubtargetEmitter(Records).run(OS);
- break;
- case GenIntrinsic:
- IntrinsicEmitter(Records).run(OS);
- break;
- case GenTgtIntrinsic:
- IntrinsicEmitter(Records, true).run(OS);
- break;
- case GenEDInfo:
- EDEmitter(Records).run(OS);
- break;
- case PrintEnums:
- {
- std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
- for (unsigned i = 0, e = Recs.size(); i != e; ++i)
- OS << Recs[i]->getName() << ", ";
- OS << "\n";
- break;
- }
- case PrintSets:
- {
- SetTheory Sets;
- Sets.addFieldExpander("Set", "Elements");
- std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
- for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
- OS << Recs[i]->getName() << " = [";
- const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
- assert(Elts && "Couldn't expand Set instance");
- for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
- OS << ' ' << (*Elts)[ei]->getName();
- OS << " ]\n";
+ cl::value_desc("class name"));
+
+ class LLVMTableGenAction : public TableGenAction {
+ public:
+ bool operator()(raw_ostream &OS, RecordKeeper &Records) {
+ switch (Action) {
+ case PrintRecords:
+ OS << Records; // No argument, dump all contents
+ break;
+ case GenEmitter:
+ CodeEmitterGen(Records).run(OS);
+ break;
+ case GenRegisterInfo:
+ RegisterInfoEmitter(Records).run(OS);
+ break;
+ case GenInstrInfo:
+ InstrInfoEmitter(Records).run(OS);
+ break;
+ case GenCallingConv:
+ CallingConvEmitter(Records).run(OS);
+ break;
+ case GenAsmWriter:
+ AsmWriterEmitter(Records).run(OS);
+ break;
+ case GenAsmMatcher:
+ AsmMatcherEmitter(Records).run(OS);
+ break;
+ case GenDisassembler:
+ DisassemblerEmitter(Records).run(OS);
+ break;
+ case GenPseudoLowering:
+ PseudoLoweringEmitter(Records).run(OS);
+ break;
+ case GenDAGISel:
+ DAGISelEmitter(Records).run(OS);
+ break;
+ case GenDFAPacketizer:
+ DFAGen(Records).run(OS);
+ break;
+ case GenFastISel:
+ FastISelEmitter(Records).run(OS);
+ break;
+ case GenSubtarget:
+ SubtargetEmitter(Records).run(OS);
+ break;
+ case GenIntrinsic:
+ IntrinsicEmitter(Records).run(OS);
+ break;
+ case GenTgtIntrinsic:
+ IntrinsicEmitter(Records, true).run(OS);
+ break;
+ case GenEDInfo:
+ EDEmitter(Records).run(OS);
+ break;
+ case PrintEnums:
+ {
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i)
+ OS << Recs[i]->getName() << ", ";
+ OS << "\n";
+ break;
}
- break;
+ case PrintSets:
+ {
+ SetTheory Sets;
+ Sets.addFieldExpander("Set", "Elements");
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
+ OS << Recs[i]->getName() << " = [";
+ const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
+ assert(Elts && "Couldn't expand Set instance");
+ for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
+ OS << ' ' << (*Elts)[ei]->getName();
+ OS << " ]\n";
+ }
+ break;
+ }
+ default:
+ assert(1 && "Invalid Action");
+ return true;
+ }
+
+ return false;
}
- default:
- assert(1 && "Invalid Action");
- return true;
- }
-
- return false;
- }
-};
+ };
+}
int main(int argc, char **argv) {
sys::PrintStackTraceOnErrorSignal();
diff --git a/utils/TableGen/X86ModRMFilters.cpp b/utils/TableGen/X86ModRMFilters.cpp
new file mode 100644
index 0000000..7166fe0
--- /dev/null
+++ b/utils/TableGen/X86ModRMFilters.cpp
@@ -0,0 +1,26 @@
+//===- X86ModRMFilters.cpp - Disassembler ModR/M filterss -------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "X86ModRMFilters.h"
+
+using namespace llvm::X86Disassembler;
+
+void ModRMFilter::anchor() { }
+
+void DumbFilter::anchor() { }
+
+void ModFilter::anchor() { }
+
+void EscapeFilter::anchor() { }
+
+void AddRegEscapeFilter::anchor() { }
+
+void ExtendedFilter::anchor() { }
+
+void ExactFilter::anchor() { }
diff --git a/utils/TableGen/X86ModRMFilters.h b/utils/TableGen/X86ModRMFilters.h
index 199040b..19fecbc 100644
--- a/utils/TableGen/X86ModRMFilters.h
+++ b/utils/TableGen/X86ModRMFilters.h
@@ -27,6 +27,7 @@
/// ModRMFilter - Abstract base class for clases that recognize patterns in
/// ModR/M bytes.
class ModRMFilter {
+ virtual void anchor();
public:
/// Destructor - Override as necessary.
virtual ~ModRMFilter() { }
@@ -49,6 +50,7 @@
/// require a ModR/M byte or instructions where the entire ModR/M byte is used
/// for operands.
class DumbFilter : public ModRMFilter {
+ virtual void anchor();
public:
bool isDumb() const {
return true;
@@ -63,7 +65,7 @@
/// Some instructions are classified based on whether they are 11 or anything
/// else. This filter performs that classification.
class ModFilter : public ModRMFilter {
-private:
+ virtual void anchor();
bool R;
public:
/// Constructor
@@ -90,7 +92,7 @@
/// possible value. Otherwise, there is one instruction for each value of the
/// nnn field [bits 5-3], known elsewhere as the reg field.
class EscapeFilter : public ModRMFilter {
-private:
+ virtual void anchor();
bool C0_FF;
uint8_t NNN_or_ModRM;
public:
@@ -121,7 +123,7 @@
/// maps to a single instruction. Such instructions require the ModR/M byte
/// to fall between 0xc0 and 0xff.
class AddRegEscapeFilter : public ModRMFilter {
-private:
+ virtual void anchor();
uint8_t ModRM;
public:
/// Constructor
@@ -142,7 +144,7 @@
/// ExtendedFilter - Extended opcodes are classified based on the value of the
/// mod field [bits 7-6] and the value of the nnn field [bits 5-3].
class ExtendedFilter : public ModRMFilter {
-private:
+ virtual void anchor();
bool R;
uint8_t NNN;
public:
@@ -169,9 +171,8 @@
/// ExactFilter - The occasional extended opcode (such as VMCALL or MONITOR)
/// requires the ModR/M byte to have a specific value.
-class ExactFilter : public ModRMFilter
-{
-private:
+class ExactFilter : public ModRMFilter {
+ virtual void anchor();
uint8_t ModRM;
public:
/// Constructor