Fix last night's PPC32 regressions by
1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index b331785..3d13b21 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1625,6 +1625,7 @@
False = DAG.getNode(ISD::XOR, NVT, False,
DAG.getConstant(1ULL << ShiftAmt, NVT));
Result = LegalizeOp(DAG.getNode(ISD::SELECT, NVT, Tmp3, True, False));
+ return Result;
} else {
assert(0 && "Do not know how to expand FP_TO_SINT yet!");
}
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 80a405e..9831111 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -2162,9 +2162,8 @@
// If the False value only has one use, we can generate better code by
// selecting it in the fallthrough basic block rather than here, which
// increases register pressure.
- bool FalseHasOneUse = N.getOperand(3).Val->hasOneUse();
unsigned TrueValue = SelectExpr(N.getOperand(2));
- unsigned FalseValue = FalseHasOneUse ? 0 : SelectExpr(N.getOperand(3));
+ unsigned FalseValue = SelectExpr(N.getOperand(3));
unsigned CCReg = SelectCC(N.getOperand(0), N.getOperand(1), CC);
Opc = getBCCForSetCC(CC);
@@ -2195,7 +2194,6 @@
// %FalseValue = ...
// # fallthrough to sinkMBB
BB = copy0MBB;
- if (FalseHasOneUse) FalseValue = SelectExpr(N.getOperand(3));
// Update machine-CFG edges
BB->addSuccessor(sinkMBB);