diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index 17e31c6..74c9afb 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -298,23 +298,22 @@
 -->  
   
 <!--=========================================================================-->
-<!--
-<h3>TTA-based Codesign Environment (TCE)</h3>
-  
+<h3>TTA-based Co-design Environment (TCE)</h3>
+
 <div>
+
 <p>TCE is a toolset for designing application-specific processors (ASP) based on
-the Transport triggered architecture (TTA). The toolset provides a complete
-co-design flow from C/C++ programs down to synthesizable VHDL and parallel
-program binaries. Processor customization points include the register files,
-function units, supported operations, and the interconnection network.</p>
-  
+   the Transport triggered architecture (TTA). The toolset provides a complete
+   co-design flow from C/C++ programs down to synthesizable VHDL and parallel
+   program binaries. Processor customization points include the register files,
+   function units, supported operations, and the interconnection network.</p>
+
 <p>TCE uses Clang and LLVM for C/C++ language support, target independent
-optimizations and also for parts of code generation. It generates new LLVM-based
-code generators "on the fly" for the designed TTA processors and loads them in
-to the compiler backend as runtime libraries to avoid per-target recompilation
-of larger parts of the compiler chain.</p>
+   optimizations and also for parts of code generation. It generates new
+   LLVM-based code generators <i>on the fly</i> for the designed TTA processors
+   and loads them in to the compiler backend as runtime libraries to avoid
+   per-target recompilation of larger parts of the compiler chain.</p>
 </div>
--->
 
   
 <!--=========================================================================-->