Convert operand iterator over to work like an STL iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1720 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InstrSched/SchedPriorities.cpp b/lib/CodeGen/InstrSched/SchedPriorities.cpp
index fed3f94..1d49831 100644
--- a/lib/CodeGen/InstrSched/SchedPriorities.cpp
+++ b/lib/CodeGen/InstrSched/SchedPriorities.cpp
@@ -20,7 +20,6 @@
#include "SchedPriorities.h"
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
#include "Support/PostOrderIterator.h"
#include <iostream>
using std::cerr;
@@ -266,24 +265,25 @@
bool
SchedPriorities::instructionHasLastUse(MethodLiveVarInfo& methodLiveVarInfo,
const SchedGraphNode* graphNode) {
- const MachineInstr* minstr = graphNode->getMachineInstr();
+ const MachineInstr *MI = graphNode->getMachineInstr();
std::hash_map<const MachineInstr*, bool>::const_iterator
- ui = lastUseMap.find(minstr);
+ ui = lastUseMap.find(MI);
if (ui != lastUseMap.end())
return ui->second;
// else check if instruction is a last use and save it in the hash_map
bool hasLastUse = false;
const BasicBlock* bb = graphNode->getBB();
- const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(minstr, bb);
+ const ValueSet &LVs = methodLiveVarInfo.getLiveVarSetBeforeMInst(MI, bb);
- for (MachineInstr::val_const_op_iterator vo(minstr); !vo.done(); ++vo)
- if (!LVs.count(*vo)) {
+ for (MachineInstr::const_val_op_iterator OI = MI->begin(), OE = MI->end();
+ OI != OE; ++OI)
+ if (!LVs.count(*OI)) {
hasLastUse = true;
break;
}
- return lastUseMap[minstr] = hasLastUse;
+ return lastUseMap[MI] = hasLastUse;
}
diff --git a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
index 7d43763..7302baa 100644
--- a/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
+++ b/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
@@ -7,24 +7,15 @@
#include <iostream>
using std::cerr;
-//---------------------------------------------------------------------------
-// Constructor
-//---------------------------------------------------------------------------
-LiveRangeInfo::LiveRangeInfo(const Method *const M,
- const TargetMachine& tm,
+LiveRangeInfo::LiveRangeInfo(const Method *M, const TargetMachine &tm,
std::vector<RegClass *> &RCL)
- : Meth(M), TM(tm),
- RegClassList(RCL), MRI(tm.getRegInfo())
-{ }
+ : Meth(M), TM(tm), RegClassList(RCL), MRI(tm.getRegInfo()) { }
-//---------------------------------------------------------------------------
-// Destructor: Deletes all LiveRanges in the LiveRangeMap
-//---------------------------------------------------------------------------
LiveRangeInfo::~LiveRangeInfo() {
- LiveRangeMapType::iterator MI = LiveRangeMap.begin();
+ for (LiveRangeMapType::iterator MI = LiveRangeMap.begin();
+ MI != LiveRangeMap.end(); ++MI) {
- for( ; MI != LiveRangeMap.end() ; ++MI) {
if (MI->first && MI->second) {
LiveRange *LR = MI->second;
@@ -33,9 +24,7 @@
// live range. We have to make the other entries NULL when we delete
// a live range.
- LiveRange::iterator LI = LR->begin();
-
- for( ; LI != LR->end() ; ++LI)
+ for(LiveRange::iterator LI = LR->begin(); LI != LR->end(); ++LI)
LiveRangeMap[*LI] = 0;
delete LR;
@@ -87,10 +76,9 @@
// ranges for all values defined in the instruction stream. Also, it
// creates live ranges for all incoming arguments of the method.
//---------------------------------------------------------------------------
-void LiveRangeInfo::constructLiveRanges()
-{
+void LiveRangeInfo::constructLiveRanges() {
- if( DEBUG_RA)
+ if (DEBUG_RA)
cerr << "Consturcting Live Ranges ...\n";
// first find the live ranges for all incoming args of the method since
@@ -129,11 +117,8 @@
// Now find speical LLVM instructions (CALL, RET) and LRs in machine
// instructions.
-
-
- Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
- for( ; BBI != Meth->end(); ++BBI) { // go thru BBs in random order
-
+ //
+ for (Method::const_iterator BBI = Meth->begin(); BBI != Meth->end(); ++BBI) {
// Now find all LRs for machine the instructions. A new LR will be created
// only for defs in the machine instr since, we assume that all Values are
// defined before they are used. However, there can be multiple defs for
@@ -141,12 +126,11 @@
// get the iterator for machine instructions
const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
- MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
// iterate over all the machine instructions in BB
- for( ; MInstIterator != MIVec.end(); MInstIterator++) {
-
- const MachineInstr * MInst = *MInstIterator;
+ for(MachineCodeForBasicBlock::const_iterator MInstIterator = MIVec.begin();
+ MInstIterator != MIVec.end(); ++MInstIterator) {
+ const MachineInstr *MInst = *MInstIterator;
// Now if the machine instruction is a call/return instruction,
// add it to CallRetInstrList for processing its implicit operands
@@ -157,7 +141,8 @@
// iterate over MI operands to find defs
- for (MachineInstr::val_const_op_iterator OpI(MInst); !OpI.done(); ++OpI) {
+ for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+ OpE = MInst->end(); OpI != OpE; ++OpI) {
if(DEBUG_RA) {
MachineOperand::MachineOperandType OpTyp =
OpI.getMachineOperand().getOperandType();
@@ -311,33 +296,27 @@
// iterate over MI operands to find defs
- for(MachineInstr::val_const_op_iterator DefI(MInst);!DefI.done();++DefI){
-
- if( DefI.isDef() ) { // iff this operand is a def
+ for(MachineInstr::const_val_op_iterator DefI = MInst->begin(),
+ DefE = MInst->end(); DefI != DefE; ++DefI) {
+ if (DefI.isDef()) { // iff this operand is a def
+ LiveRange *LROfDef = getLiveRangeForValue( *DefI );
+ RegClass *RCOfDef = LROfDef->getRegClass();
- LiveRange *const LROfDef = getLiveRangeForValue( *DefI );
- assert( LROfDef );
- RegClass *const RCOfDef = LROfDef->getRegClass();
+ MachineInstr::const_val_op_iterator UseI = MInst->begin(),
+ UseE = MInst->end();
+ for( ; UseI != UseE; ++UseI){ // for all uses
- MachineInstr::val_const_op_iterator UseI(MInst);
- for( ; !UseI.done(); ++UseI){ // for all uses
-
- LiveRange *const LROfUse = getLiveRangeForValue( *UseI );
-
- if( ! LROfUse ) { // if LR of use is not found
-
+ LiveRange *LROfUse = getLiveRangeForValue( *UseI );
+ if (!LROfUse) { // if LR of use is not found
//don't warn about labels
if (!isa<BasicBlock>(*UseI) && DEBUG_RA)
cerr << " !! Warning: No LR for use " << RAV(*UseI) << "\n";
continue; // ignore and continue
}
- if( LROfUse == LROfDef) // nothing to merge if they are same
+ if (LROfUse == LROfDef) // nothing to merge if they are same
continue;
- //RegClass *const RCOfUse = LROfUse->getRegClass();
- //if( RCOfDef == RCOfUse ) { // if the reg classes are the same
-
if (MRI.getRegType(LROfDef) == MRI.getRegType(LROfUse)) {
// If the two RegTypes are the same
@@ -356,26 +335,17 @@
unionAndUpdateLRs(LROfDef, LROfUse);
}
-
} // if combined degree is less than # of regs
-
} // if def and use do not interfere
-
}// if reg classes are the same
-
} // for all uses
-
} // if def
-
} // for all defs
-
} // for all machine instructions
-
} // for all BBs
- if( DEBUG_RA)
+ if (DEBUG_RA)
cerr << "\nCoalscing Done!\n";
-
}
@@ -395,5 +365,3 @@
}
}
}
-
-
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index b296cae..18d019e 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -15,7 +15,6 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForMethod.h"
#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
-#include "llvm/Analysis/LiveVar/ValueSet.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineFrameInfo.h"
@@ -310,19 +309,15 @@
// iterate over all MI operands to find defs
//
- for( MachineInstr::val_const_op_iterator OpI(MInst);!OpI.done(); ++OpI) {
-
- if( OpI.isDef() ) {
- // create a new LR iff this operand is a def
- //
+ for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
+ OpE = MInst->end(); OpI != OpE; ++OpI) {
+ if (OpI.isDef()) // create a new LR iff this operand is a def
addInterference(*OpI, &LVSetAI, isCallInst);
- }
// Calculate the spill cost of each live range
//
- LiveRange *LR = LRI.getLiveRangeForValue( *OpI );
- if( LR )
- LR->addSpillCost(BBLoopDepthCost);
+ LiveRange *LR = LRI.getLiveRangeForValue(*OpI);
+ if (LR) LR->addSpillCost(BBLoopDepthCost);
}
@@ -372,43 +367,32 @@
// iterate over MI operands to find defs
//
- for( MachineInstr::val_const_op_iterator It1(MInst);!It1.done(); ++It1) {
-
- const LiveRange *const LROfOp1 = LRI.getLiveRangeForValue( *It1 );
+ for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
+ ItE = MInst->end(); It1 != ItE; ++It1) {
+ const LiveRange *LROfOp1 = LRI.getLiveRangeForValue(*It1);
+ assert((LROfOp1 || !It1.isDef()) && "No LR for Def in PSEUDO insruction");
- if( !LROfOp1 && It1.isDef() )
- assert( 0 && "No LR for Def in PSEUDO insruction");
+ MachineInstr::const_val_op_iterator It2 = It1;
+ for(++It2; It2 != ItE; ++It2) {
+ const LiveRange *LROfOp2 = LRI.getLiveRangeForValue(*It2);
- MachineInstr::val_const_op_iterator It2 = It1;
- ++It2;
-
- for( ; !It2.done(); ++It2) {
-
- const LiveRange *const LROfOp2 = LRI.getLiveRangeForValue( *It2 );
-
- if( LROfOp2) {
-
- RegClass *const RCOfOp1 = LROfOp1->getRegClass();
- RegClass *const RCOfOp2 = LROfOp2->getRegClass();
+ if (LROfOp2) {
+ RegClass *RCOfOp1 = LROfOp1->getRegClass();
+ RegClass *RCOfOp2 = LROfOp2->getRegClass();
if( RCOfOp1 == RCOfOp2 ){
RCOfOp1->setInterference( LROfOp1, LROfOp2 );
setInterf = true;
}
-
} // if Op2 has a LR
-
} // for all other defs in machine instr
-
} // for all operands in an instruction
- if( !setInterf && (MInst->getNumOperands() > 2) ) {
+ if (!setInterf && MInst->getNumOperands() > 2) {
cerr << "\nInterf not set for any operand in pseudo instr:\n";
cerr << *MInst;
assert(0 && "Interf not set for pseudo instr with > 2 operands" );
-
}
-
}