make -print-machineinstrs work for both SparcV9 and X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index acd76fb..485a358 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -162,6 +162,10 @@
PM.add(createInstructionSchedulingWithSSAPass(*this));
PM.add(getRegisterAllocator(*this));
+
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
PM.add(createPrologEpilogInsertionPass());
if (!DisablePeephole)
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 2c8b796..82778d9 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -14,9 +14,23 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Type.h"
#include "llvm/IntrinsicLowering.h"
+#include "Support/CommandLine.h"
using namespace llvm;
//---------------------------------------------------------------------------
+// Command-line options that tend to be useful on more than one back-end.
+//
+
+namespace llvm {
+ bool PrintMachineCode;
+};
+namespace {
+ cl::opt<bool, true> PrintCode("print-machineinstrs",
+ cl::desc("Print generated machine code"),
+ cl::location(PrintMachineCode), cl::init(false));
+};
+
+//---------------------------------------------------------------------------
// TargetMachine Class
//
TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il,
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 4886a11..31c5e57 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -25,8 +25,6 @@
using namespace llvm;
namespace {
- cl::opt<bool> PrintCode("print-machineinstrs",
- cl::desc("Print generated machine code"));
cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
cl::desc("Use the 'simple' X86 instruction selector"));
cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
@@ -79,18 +77,18 @@
PM.add(createX86SSAPeepholeOptimizerPass());
// Print the instruction selected machine code...
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references...
@@ -98,7 +96,7 @@
PM.add(createX86PeepholeOptimizerPass());
- if (PrintCode) // Print the register-allocated code
+ if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, *this));
if (!DisableOutput)
@@ -138,18 +136,18 @@
// FIXME: Add SSA based peephole optimizer here.
// Print the instruction selected machine code...
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
PM.add(createX86FloatingPointStackifierPass());
- if (PrintCode)
+ if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
// Insert prolog/epilog code. Eliminate abstract frame index references...
@@ -157,7 +155,7 @@
PM.add(createX86PeepholeOptimizerPass());
- if (PrintCode) // Print the register-allocated code
+ if (PrintMachineCode) // Print the register-allocated code
PM.add(createX86CodePrinterPass(std::cerr, TM));
}