commit 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556
author Dan Gohman <gohman@apple.com> Thu May 06 20:33:48 2010 +0000
committer Dan Gohman <gohman@apple.com> Thu May 06 20:33:48 2010 +0000
tree 7fe414b47ddf800a4b132ac4b3cfe9d3da7ab8e9
parent 746ad69e088176819981b4b2c5ac8dcd49f5e60e

Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/MSP430/MSP430InstrInfo.cpp

diff --git a/lib/Target/MSP430/MSP430InstrInfo.cpp b/lib/Target/MSP430/MSP430InstrInfo.cpp
index d4442d0..527cf1f 100644
--- a/lib/Target/MSP430/MSP430InstrInfo.cpp
+++ b/lib/Target/MSP430/MSP430InstrInfo.cpp
@@ -87,10 +87,8 @@
                                    MachineBasicBlock::iterator I,
                                    unsigned DestReg, unsigned SrcReg,
                                    const TargetRegisterClass *DestRC,
-                                   const TargetRegisterClass *SrcRC) const {
-  DebugLoc DL;
-  if (I != MBB.end()) DL = I->getDebugLoc();
-
+                                   const TargetRegisterClass *SrcRC,
+                                   DebugLoc DL) const {
   if (DestRC == SrcRC) {
     unsigned Opc;
     if (DestRC == &MSP430::GR16RegClass) {