Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31363 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index ad09f82..0a91124 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -199,17 +199,20 @@
unsigned physReg = Virt2PhysRegMap[virtualReg];
if (physReg == 0) {
if (op.isDef()) {
- if (!TM->getInstrInfo()->isTwoAddrInstr(MI->getOpcode()) || i) {
+ int TiedOp = TM->getInstrInfo()
+ ->getTiedToSrcOperand(MI->getOpcode(), i);
+ if (TiedOp == -1) {
physReg = getFreeReg(virtualReg);
} else {
- // must be same register number as the first operand
- // This maps a = b + c into b = b + c, and saves b into a's spot.
- assert(MI->getOperand(1).isRegister() &&
- MI->getOperand(1).getReg() &&
- MI->getOperand(1).isUse() &&
+ // must be same register number as the source operand that is
+ // tied to. This maps a = b + c into b = b + c, and saves b into
+ // a's spot.
+ assert(MI->getOperand(TiedOp).isRegister() &&
+ MI->getOperand(TiedOp).getReg() &&
+ MI->getOperand(TiedOp).isUse() &&
"Two address instruction invalid!");
- physReg = MI->getOperand(1).getReg();
+ physReg = MI->getOperand(TiedOp).getReg();
}
spillVirtReg(MBB, next(MI), virtualReg, physReg);
} else {