commit 36d96337f7bf17a35c44403ca5df4023be7f0157
author Vincent Lejeune <vljn@ovi.com> Sun Oct 13 17:56:21 2013 +0000
committer Vincent Lejeune <vljn@ovi.com> Sun Oct 13 17:56:21 2013 +0000
tree 7d9f64a498ed6aa39cd2ad5363eff1d9dc83e4c5
parent 6a809a8d292ca4aa70cc07ce6b573239f397bb47

R600/SI: Add SinkingPass before ISel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192556 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/AMDGPUTargetMachine.cpp

diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp
index 1fef0b1..cd7a616 100644
--- a/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -128,6 +128,7 @@
       ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS)
     addPass(createStructurizeCFGPass());
   if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
+    addPass(createSinkingPass());
     addPass(createSITypeRewriter());
     addPass(createSIAnnotateControlFlowPass());
   } else {