commit 3821b1885e13dcdda6aa2853f1317d3288256685
author Nick Lewycky <nicholas@mxc.ca> Thu Oct 13 00:54:59 2011 +0000
committer Nick Lewycky <nicholas@mxc.ca> Thu Oct 13 00:54:59 2011 +0000
tree 9449152cb178ed8a2911ecba4ad6dc1a20ceb225
parent fc61a23506fdad8f38e3437d741a4108339abcfe

Add missing braces to pacify GCC's -Wparentheses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141842 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 0ef1ef6..a240667 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -1473,11 +1473,12 @@
       }
 
       unsigned RCID = 0;
-      if (InlineAsm::hasRegClassConstraint(Flag, RCID))
+      if (InlineAsm::hasRegClassConstraint(Flag, RCID)) {
         if (TM)
           OS << ':' << TM->getRegisterInfo()->getRegClass(RCID)->getName();
         else
           OS << ":RC" << RCID;
+      }
 
       unsigned TiedTo = 0;
       if (InlineAsm::isUseOperandTiedToDef(Flag, TiedTo))