Do not promote i32 arguments to i64. This was causing unnecessary sign extension
instructions to be emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150782 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsCallingConv.td b/lib/Target/Mips/MipsCallingConv.td
index c340765..878ee38 100644
--- a/lib/Target/Mips/MipsCallingConv.td
+++ b/lib/Target/Mips/MipsCallingConv.td
@@ -38,10 +38,15 @@
// Handles byval parameters.
CCIfByVal<CCCustom<"CC_Mips64Byval">>,
- // Promote i8/i16/i32 arguments to i64.
- CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
+ // Promote i8/i16 arguments to i32.
+ CCIfType<[i8, i16], CCPromoteToType<i32>>,
// Integer arguments are passed in integer registers.
+ CCIfType<[i32], CCAssignToRegWithShadow<[A0, A1, A2, A3,
+ T0, T1, T2, T3],
+ [F12, F13, F14, F15,
+ F16, F17, F18, F19]>>,
+
CCIfType<[i64], CCAssignToRegWithShadow<[A0_64, A1_64, A2_64, A3_64,
T0_64, T1_64, T2_64, T3_64],
[D12_64, D13_64, D14_64, D15_64,
@@ -60,8 +65,8 @@
T0_64, T1_64, T2_64, T3_64]>>,
// All stack parameter slots become 64-bit doublewords and are 8-byte aligned.
- CCIfType<[i64, f64], CCAssignToStack<8, 8>>,
- CCIfType<[f32], CCAssignToStack<4, 8>>
+ CCIfType<[i32, f32], CCAssignToStack<4, 8>>,
+ CCIfType<[i64, f64], CCAssignToStack<8, 8>>
]>;
// N32/64 variable arguments.
@@ -70,17 +75,17 @@
// Handles byval parameters.
CCIfByVal<CCCustom<"CC_Mips64Byval">>,
- // Promote i8/i16/i32 arguments to i64.
- CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
+ // Promote i8/i16 arguments to i32.
+ CCIfType<[i8, i16], CCPromoteToType<i32>>,
+
+ CCIfType<[i32, f32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>,
CCIfType<[i64, f64], CCAssignToReg<[A0_64, A1_64, A2_64, A3_64,
T0_64, T1_64, T2_64, T3_64]>>,
- CCIfType<[f32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>,
-
// All stack parameter slots become 64-bit doublewords and are 8-byte aligned.
- CCIfType<[i64, f64], CCAssignToStack<8, 8>>,
- CCIfType<[f32], CCAssignToStack<4, 8>>
+ CCIfType<[i32, f32], CCAssignToStack<4, 8>>,
+ CCIfType<[i64, f64], CCAssignToStack<8, 8>>
]>;
def RetCC_MipsN : CallingConv<[
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 23d0a6d..616e807 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -2299,10 +2299,7 @@
Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, LocVT, Arg);
break;
case CCValAssign::AExt:
- if (ValVT == MVT::i32)
- Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, LocVT, Arg);
- else
- Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
+ Arg = DAG.getNode(ISD::ANY_EXTEND, dl, LocVT, Arg);
break;
}