For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
as well as PPC codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46001 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 8450252..0587dfa 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -294,6 +294,8 @@
setOperationAction(ISD::TRAMPOLINE, MVT::Other, Custom);
+ setOperationAction(ISD::TRAP, MVT::Other, Custom);
+
// VASTART needs to be custom lowered to use the VarArgsFrameIndex
setOperationAction(ISD::VASTART , MVT::Other, Custom);
setOperationAction(ISD::VAARG , MVT::Other, Expand);
@@ -4948,6 +4950,10 @@
ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal);
}
+SDOperand X86TargetLowering::LowerTRAP(SDOperand Op, SelectionDAG &DAG) {
+ return DAG.getNode(X86ISD::TRAP, MVT::Other, Op.getOperand(0));
+}
+
SDOperand X86TargetLowering::LowerCTLZ(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType VT = Op.getValueType();
MVT::ValueType OpVT = VT;
@@ -5052,6 +5058,7 @@
case ISD::FLT_ROUNDS: return LowerFLT_ROUNDS(Op, DAG);
case ISD::CTLZ: return LowerCTLZ(Op, DAG);
case ISD::CTTZ: return LowerCTTZ(Op, DAG);
+ case ISD::TRAP: return LowerTRAP(Op, DAG);
// FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands.
case ISD::READCYCLECOUNTER:
@@ -5091,6 +5098,7 @@
case X86ISD::CALL: return "X86ISD::CALL";
case X86ISD::TAILCALL: return "X86ISD::TAILCALL";
case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG";
+ case X86ISD::TRAP: return "X86ISD::TRAP";
case X86ISD::CMP: return "X86ISD::CMP";
case X86ISD::COMI: return "X86ISD::COMI";
case X86ISD::UCOMI: return "X86ISD::UCOMI";
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 64324f3..959e610 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -197,7 +197,10 @@
TC_RETURN,
// Store FP control world into i16 memory
- FNSTCW16m
+ FNSTCW16m,
+
+ // Trapping instruction
+ TRAP
};
}
@@ -484,6 +487,7 @@
SDOperand LowerEH_RETURN(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerTRAMPOLINE(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerFLT_ROUNDS(SDOperand Op, SelectionDAG &DAG);
+ SDOperand LowerTRAP(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerCTLZ(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerCTTZ(SDOperand Op, SelectionDAG &DAG);
SDNode *ExpandFP_TO_SINT(SDNode *N, SelectionDAG &DAG);
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 02fc077..f9bdfc4 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -57,6 +57,8 @@
def SDT_X86TCRET : SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisVT<1, i32>]>;
+def SDT_X86TRAP : SDTypeProfile<0, 0, []>;
+
def X86bsf : SDNode<"X86ISD::BSF", SDTIntUnaryOp>;
def X86bsr : SDNode<"X86ISD::BSR", SDTIntUnaryOp>;
def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
@@ -107,6 +109,9 @@
def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET,
[SDNPHasChain, SDNPOptInFlag]>;
+def X86trap : SDNode<"X86ISD::TRAP", SDT_X86TRAP,
+ [SDNPHasChain, SDNPOutFlag, SDNPSideEffect]>;
+
//===----------------------------------------------------------------------===//
// X86 Operand Definitions.
//
@@ -484,6 +489,11 @@
def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)]>,
TB;
+let isBarrier = 1, hasCtrlDep = 1 in {
+// FIXME: Should use 0x0F0B opcode
+def TRAP : I<0, RawFrm, (outs), (ins), "ud2", [(X86trap)]>;
+}
+
//===----------------------------------------------------------------------===//
// Input/Output Instructions...
//