commit 3a02f020eb72cb10f7f794532ddc35e478f7e86b
author Rafael Espindola <rafael.espindola@gmail.com> Mon Sep 04 19:05:01 2006 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Mon Sep 04 19:05:01 2006 +0000
tree ede56c8859e74e025fe3d6e350008b5e45f915c8
parent 2130b99eb29796d80b978f7c4b4f64dcca0d1309

add support for returning 64bit values


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMISelDAGToDAG.cpp

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index eba7c78..9a19497 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -238,6 +238,15 @@
     if (DAG.getMachineFunction().liveout_empty())
       DAG.getMachineFunction().addLiveOut(ARM::R0);
     break;
+  case 5:
+    Copy = DAG.getCopyToReg(Chain, ARM::R1, Op.getOperand(3), SDOperand());
+    Copy = DAG.getCopyToReg(Copy, ARM::R0, Op.getOperand(1), Copy.getValue(1));
+    // If we haven't noted the R0+R1 are live out, do so now.
+    if (DAG.getMachineFunction().liveout_empty()) {
+      DAG.getMachineFunction().addLiveOut(ARM::R0);
+      DAG.getMachineFunction().addLiveOut(ARM::R1);
+    }
+    break;
   }
 
   //We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag