* Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index ff0cc81..1a926d0 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -172,6 +172,7 @@
break;
case ISD::GlobalAddress:
+ case ISD::TargetGlobalAddress:
if (AM.GV == 0) {
AM.GV = cast<GlobalAddressSDNode>(N)->getGlobal();
return false;
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 61d3aee..456a254 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -122,6 +122,7 @@
setOperationAction(ISD::SETCC , MVT::i8 , Custom);
setOperationAction(ISD::SETCC , MVT::i16 , Custom);
setOperationAction(ISD::SETCC , MVT::i32 , Custom);
+ setOperationAction(ISD::GlobalAddress , MVT::i32 , Custom);
}
// We don't have line number support yet.
@@ -1051,6 +1052,7 @@
}
case ISD::GlobalAddress:
GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
+ SDOperand GVOp = DAG.getTargetGlobalAddress(GV, getPointerTy());
// For Darwin, external and weak symbols are indirect, so we want to load
// the value at address GV, not the value of GV itself. This means that
// the GlobalAddress must be in the base or index register of the address,
@@ -1058,10 +1060,10 @@
if (getTargetMachine().
getSubtarget<X86Subtarget>().getIndirectExternAndWeakGlobals() &&
(GV->hasWeakLinkage() || GV->isExternal()))
- return DAG.getLoad(MVT::i32, DAG.getEntryNode(), Op,
- DAG.getSrcValue(NULL));
+ return DAG.getLoad(MVT::i32, DAG.getEntryNode(),
+ GVOp, DAG.getSrcValue(NULL));
else
- return Op;
+ return GVOp;
break;
}
}
@@ -1086,3 +1088,18 @@
case X86ISD::RET_FLAG: return "X86ISD::RET_FLAG";
}
}
+
+bool X86TargetLowering::isMaskedValueZeroForTargetNode(const SDOperand &Op,
+ uint64_t Mask) const {
+
+ unsigned Opc = Op.getOpcode();
+
+ switch (Opc) {
+ default:
+ assert(Opc >= ISD::BUILTIN_OP_END && "Expected a target specific node");
+ break;
+ case X86ISD::SETCC: return (Mask & 1) == 0;
+ }
+
+ return false;
+}
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index c15e009..8ebbe61 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -155,6 +155,12 @@
/// DAG node.
virtual const char *getTargetNodeName(unsigned Opcode) const;
+ /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to
+ /// be zero. Op is expected to be a target specific node. Used by DAG
+ /// combiner.
+ virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,
+ uint64_t Mask) const;
+
SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);
private:
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 074c86d..0b0ed82 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -98,8 +98,8 @@
// Define X86 specific addressing mode.
def addr : ComplexPattern<i32, 4, "SelectAddr", []>;
def leaaddr : ComplexPattern<i32, 4, "SelectLEAAddr",
- [add,
- frameindex, constpool, globaladdr, externalsym]>;
+ [add, frameindex, constpool,
+ globaladdr, tglobaladdr, externalsym]>;
//===----------------------------------------------------------------------===//
// X86 Instruction Format Definitions.