commit 3a7118d7daaf53783686fcf350dbfdaee5abd6c9
author Andrew Lenharth <andrewl@lenharth.org> Wed Feb 23 17:33:42 2005 +0000
committer Andrew Lenharth <andrewl@lenharth.org> Wed Feb 23 17:33:42 2005 +0000
tree f973c0caba545432c15d76fadec76317611897b5
parent 1f21ef1511ce003fc177121b980e783b83992f82

Ah the problems you have to fix when you stray from the One True Way (TM)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20290 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Alpha/AlphaISelPattern.cpp

diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 426c406..11299bd 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -724,8 +724,8 @@
  
   case ISD::DYNAMIC_STACKALLOC:
     // Generate both result values.
-    if (Result != 1)
-      ExprMap[N.getValue(1)] = 1;   // Generate the token
+    if (Result != notIn)
+      ExprMap[N.getValue(1)] = notIn;   // Generate the token
     else
       Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());