add shifts to addressing mode 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 8181e9c..7597a31 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -445,7 +445,8 @@
SDNode *Select(SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
bool SelectAddrRegImm(SDOperand N, SDOperand &Offset, SDOperand &Base);
- bool SelectAddrMode1(SDOperand N, SDOperand &Arg);
+ bool SelectAddrMode1(SDOperand N, SDOperand &Arg, SDOperand &Shift,
+ SDOperand &ShiftType);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -480,17 +481,38 @@
}
bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand N,
- SDOperand &Arg) {
+ SDOperand &Arg,
+ SDOperand &Shift,
+ SDOperand &ShiftType) {
switch(N.getOpcode()) {
case ISD::Constant: {
//TODO:check that we have a valid constant
int32_t t = cast<ConstantSDNode>(N)->getValue();
- Arg = CurDAG->getTargetConstant(t, MVT::i32);
+ Arg = CurDAG->getTargetConstant(t, MVT::i32);
+ Shift = CurDAG->getTargetConstant(0, MVT::i32);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32);
return true;
}
+ case ISD::SRA:
+ Arg = N.getOperand(0);
+ Shift = N.getOperand(1);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::ASR, MVT::i32);
+ return true;
+ case ISD::SRL:
+ Arg = N.getOperand(0);
+ Shift = N.getOperand(1);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::LSR, MVT::i32);
+ return true;
+ case ISD::SHL:
+ Arg = N.getOperand(0);
+ Shift = N.getOperand(1);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32);
+ return true;
}
- Arg = N;
+ Arg = N;
+ Shift = CurDAG->getTargetConstant(0, MVT::i32);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32);
return true;
}