* Stop ignoring cc registers, since we actually use them in branches.
* Added comment as to why we are still ignoring predict and annul bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6636 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index b32a38a..cd259ec 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -63,8 +63,8 @@
for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
if (Vals[i].getName() != "Inst" &&
!Vals[i].getValue()->isComplete() &&
+ /* ignore annul and predict bits since no one sets them yet */
Vals[i].getName() != "annul" &&
- Vals[i].getName() != "cc" &&
Vals[i].getName() != "predict")
{
o << " // op" << op << ": " << Vals[i].getName() << "\n"
@@ -105,6 +105,7 @@
}
}
} else {
+ // ignore annul and predict bits since no one sets them yet
if (Vals[f].getName() == "annul" || Vals[f].getName() == "predict")
--Offset;
}