Use the new subtarget support to automatically choose the correct ABI
and asm printer for PowerPC if one is not specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index 2761910..58b0a6f 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -22,6 +22,10 @@
class FunctionPass;
class TargetMachine;
+enum PPCTargetEnum {
+ TargetDefault, TargetAIX, TargetDarwin
+};
+
FunctionPass *createPPCBranchSelectionPass();
FunctionPass *createPPC32ISelSimple(TargetMachine &TM);
FunctionPass *createPPC32ISelPattern(TargetMachine &TM);
@@ -31,6 +35,7 @@
extern bool GPOPT;
extern bool PICEnabled;
+extern PPCTargetEnum PPCTarget;
} // end namespace llvm;
// GCC #defines PPC on Linux but we use it as our namespace name
diff --git a/lib/Target/PowerPC/PPC32RegisterInfo.td b/lib/Target/PowerPC/PPC32RegisterInfo.td
index 9536de1..c725551 100644
--- a/lib/Target/PowerPC/PPC32RegisterInfo.td
+++ b/lib/Target/PowerPC/PPC32RegisterInfo.td
@@ -22,7 +22,7 @@
{
let Methods = [{
iterator allocation_order_begin(MachineFunction &MF) const {
- return begin() + (AIX ? 1 : 0);
+ return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
}
iterator allocation_order_end(MachineFunction &MF) const {
if (hasFP(MF))
diff --git a/lib/Target/PowerPC/PPC64RegisterInfo.cpp b/lib/Target/PowerPC/PPC64RegisterInfo.cpp
index e725da6..fd5d442 100644
--- a/lib/Target/PowerPC/PPC64RegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPC64RegisterInfo.cpp
@@ -31,11 +31,6 @@
#include <iostream>
using namespace llvm;
-namespace llvm {
- // Switch toggling compilation for AIX
- extern cl::opt<bool> AIX;
-}
-
PPC64RegisterInfo::PPC64RegisterInfo()
: PPC64GenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP) {
ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX;
diff --git a/lib/Target/PowerPC/PPC64RegisterInfo.td b/lib/Target/PowerPC/PPC64RegisterInfo.td
index 9fa57a9..974ebec 100644
--- a/lib/Target/PowerPC/PPC64RegisterInfo.td
+++ b/lib/Target/PowerPC/PPC64RegisterInfo.td
@@ -22,7 +22,7 @@
{
let Methods = [{
iterator allocation_order_begin(MachineFunction &MF) const {
- return begin() + (AIX ? 1 : 0);
+ return begin() + ((TargetAIX == PPCTarget) ? 1 : 0);
}
iterator allocation_order_end(MachineFunction &MF) const {
if (hasFP(MF))
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 0b6041f..ce6c46c 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -31,11 +31,6 @@
#include <iostream>
using namespace llvm;
-namespace llvm {
- // Switch toggling compilation for AIX
- extern cl::opt<bool> AIX;
-}
-
PPC32RegisterInfo::PPC32RegisterInfo()
: PPC32GenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP) {
ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX;
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 8393a3b..8e64089 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -19,6 +19,7 @@
#include "PPC64JITInfo.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
+#include "llvm/Analysis/Verifier.h"
#include "llvm/CodeGen/IntrinsicLowering.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
@@ -30,11 +31,17 @@
using namespace llvm;
bool llvm::GPOPT = false;
+PPCTargetEnum llvm::PPCTarget = TargetDefault;
namespace llvm {
- cl::opt<bool> AIX("aix",
- cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
- cl::Hidden);
+ cl::opt<PPCTargetEnum, true>
+ PPCTargetArg(
+ cl::desc("Force generation of code for a specific PPC target:"),
+ cl::values(
+ clEnumValN(TargetAIX, "aix", " Enable AIX codegen"),
+ clEnumValN(TargetDarwin,"darwin"," Enable Darwin codegen"),
+ clEnumValEnd),
+ cl::location(PPCTarget), cl::init(TargetDefault));
cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
cl::desc("Enable LSR for PPC (beta)"),
cl::Hidden);
@@ -62,7 +69,12 @@
const Module &M,
const TargetData &TD,
const PowerPCFrameInfo &TFI)
-: TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {}
+: TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) {
+ if (TargetDefault == PPCTarget) {
+ if (Subtarget.IsAIX()) PPCTarget = TargetAIX;
+ if (Subtarget.IsDarwin()) PPCTarget = TargetDarwin;
+ }
+}
unsigned PPC32TargetMachine::getJITMatchQuality() {
#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
@@ -84,6 +96,7 @@
if (EnablePPCLSR) {
PM.add(createLoopStrengthReducePass());
+ PM.add(createVerifierPass());
PM.add(createCFGSimplificationPass());
}
@@ -122,10 +135,19 @@
// Must run branch selection immediately preceding the asm printer
PM.add(createPPCBranchSelectionPass());
- if (AIX)
+ // Decide which asm printer to use. If the user has not specified one on
+ // the command line, choose whichever one matches the default (current host).
+ switch (PPCTarget) {
+ case TargetDefault:
+ assert(0 && "Default host has no asm printer!");
+ break;
+ case TargetAIX:
PM.add(createAIXAsmPrinter(Out, *this));
- else
+ break;
+ case TargetDarwin:
PM.add(createDarwinAsmPrinter(Out, *this));
+ break;
+ }
PM.add(createMachineCodeDeleter());
return false;