Add support for vector remainder operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43744 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/AsmParser/llvmAsmParser.y b/lib/AsmParser/llvmAsmParser.y
index 7084538..f1c385f 100644
--- a/lib/AsmParser/llvmAsmParser.y
+++ b/lib/AsmParser/llvmAsmParser.y
@@ -2812,11 +2812,6 @@
!isa<VectorType>((*$2).get()))
GEN_ERROR(
"Arithmetic operator requires integer, FP, or packed operands");
- if (isa<VectorType>((*$2).get()) &&
- ($1 == Instruction::URem ||
- $1 == Instruction::SRem ||
- $1 == Instruction::FRem))
- GEN_ERROR("Remainder not supported on vector types");
Value* val1 = getVal(*$2, $3);
CHECK_FOR_ERROR
Value* val2 = getVal(*$2, $5);
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 8b60d7c..d688465 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2925,6 +2925,8 @@
Result = DAG.getNode(DivOpc, VT, Tmp1, Tmp2);
Result = DAG.getNode(ISD::MUL, VT, Result, Tmp2);
Result = DAG.getNode(ISD::SUB, VT, Tmp1, Result);
+ } else if (MVT::isVector(VT)) {
+ Result = LegalizeOp(UnrollVectorOp(Op));
} else {
assert(VT == MVT::i32 &&
"Cannot expand this binary operator!");
@@ -2933,13 +2935,17 @@
SDOperand Dummy;
Result = ExpandLibCall(TLI.getLibcallName(LC), Node, isSigned, Dummy);
}
- } else {
- // Floating point mod -> fmod libcall.
- RTLIB::Libcall LC = VT == MVT::f32
- ? RTLIB::REM_F32 : RTLIB::REM_F64;
- SDOperand Dummy;
- Result = ExpandLibCall(TLI.getLibcallName(LC), Node,
- false/*sign irrelevant*/, Dummy);
+ } else if (MVT::isFloatingPoint(VT)) {
+ if (MVT::isVector(VT)) {
+ Result = LegalizeOp(UnrollVectorOp(Op));
+ } else {
+ // Floating point mod -> fmod libcall.
+ RTLIB::Libcall LC = VT == MVT::f32
+ ? RTLIB::REM_F32 : RTLIB::REM_F64;
+ SDOperand Dummy;
+ Result = ExpandLibCall(TLI.getLibcallName(LC), Node,
+ false/*sign irrelevant*/, Dummy);
+ }
}
break;
}