diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index c238fd3..aa6beb3 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -2209,7 +2209,6 @@
     <th>Feature</th>
     <th>ARM</th>
     <th>Alpha</th>
-    <th>Blackfin</th>
     <th>CellSPU</th>
     <th>MBlaze</th>
     <th>MSP430</th>
@@ -2225,7 +2224,6 @@
   <td><a href="#feat_reliable">is generally reliable</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="unknown"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
@@ -2241,7 +2239,6 @@
   <td><a href="#feat_asmparser">assembly parser</a></td>
   <td class="no"></td> <!-- ARM -->
   <td class="no"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
@@ -2257,7 +2254,6 @@
   <td><a href="#feat_disassembler">disassembler</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="no"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
@@ -2273,7 +2269,6 @@
   <td><a href="#feat_inlineasm">inline asm</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="unknown"></td> <!-- Alpha -->
-  <td class="yes"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
@@ -2289,7 +2284,6 @@
   <td><a href="#feat_jit">jit</a></td>
   <td class="partial"><a href="#feat_jit_arm">*</a></td> <!-- ARM -->
   <td class="no"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
@@ -2305,7 +2299,6 @@
   <td><a href="#feat_objectwrite">.o&nbsp;file writing</a></td>
   <td class="no"></td> <!-- ARM -->
   <td class="no"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
@@ -2321,7 +2314,6 @@
   <td><a href="#feat_tailcall">tail calls</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="unknown"></td> <!-- Alpha -->
-  <td class="no"></td> <!-- Blackfin -->
   <td class="no"></td> <!-- CellSPU -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index e7f318a..ce5804b 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -759,7 +759,7 @@
 href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">LLVMdev list</a>.</p>
 
 <ul>
-<li>The Alpha, Blackfin, CellSPU, MicroBlaze, MSP430, MIPS, PTX,
+<li>The Alpha, CellSPU, MicroBlaze, MSP430, MIPS, PTX,
     and XCore backends are experimental.</li>
 <li><tt>llc</tt> "<tt>-filetype=obj</tt>" is experimental on all targets
     other than darwin and ELF X86 systems.</li>