Add an instruction selector emitter skeleton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7629 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 8a22c54..8c9f550 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -15,6 +15,7 @@
#include "CodeEmitterGen.h"
#include "RegisterInfoEmitter.h"
#include "InstrInfoEmitter.h"
+#include "InstrSelectorEmitter.h"
#include <algorithm>
#include <fstream>
@@ -22,7 +23,7 @@
PrintRecords,
GenEmitter,
GenRegisterEnums, GenRegister, GenRegisterHeader,
- GenInstrEnums, GenInstrs,
+ GenInstrEnums, GenInstrs, GenInstrSelector,
PrintEnums,
Parse,
};
@@ -44,6 +45,8 @@
"Generate enum values for instructions"),
clEnumValN(GenInstrs, "gen-instr-desc",
"Generate instruction descriptions"),
+ clEnumValN(GenInstrSelector, "gen-instr-selector",
+ "Generate an instruction selector"),
clEnumValN(PrintEnums, "print-enums",
"Print enum values for a class"),
clEnumValN(Parse, "parse",
@@ -440,7 +443,9 @@
case GenInstrs:
InstrInfoEmitter(Records).run(*Out);
break;
-
+ case GenInstrSelector:
+ InstrSelectorEmitter(Records).run(*Out);
+ break;
case PrintEnums:
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
for (unsigned i = 0, e = Recs.size(); i != e; ++i)