add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37168 91177308-0d34-0410-b5e6-96231b3b80d8
1 file changed