commit 3ff0abfaabc2c7f604d490be587b9c27e7c91ac0
author Tom Stellard <thomas.stellard@amd.com> Fri Jun 07 20:37:48 2013 +0000
committer Tom Stellard <thomas.stellard@amd.com> Fri Jun 07 20:37:48 2013 +0000
tree 159b1d39952b6a6af115ed1ee8e4946200c89bbf
parent c1dcb8d654d4468d63224269ee3c92480bf2385b

R600: Rework subtarget info and remove AMDILDevice classes

This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/R600MachineScheduler.cpp

diff --git a/lib/Target/R600/R600MachineScheduler.cpp b/lib/Target/R600/R600MachineScheduler.cpp
index e4a78bf..29f3e1a 100644
--- a/lib/Target/R600/R600MachineScheduler.cpp
+++ b/lib/Target/R600/R600MachineScheduler.cpp
@@ -38,6 +38,7 @@
 
   const AMDGPUSubtarget &ST = DAG->TM.getSubtarget<AMDGPUSubtarget>();
   InstKindLimit[IDFetch] = ST.getTexVTXClauseSize();
+
 }
 
 void R600SchedStrategy::MoveUnits(std::vector<SUnit *> &QSrc,