diff --git a/docs/UsingLibraries.html b/docs/UsingLibraries.html
index 20bc5f0..d41b146 100644
--- a/docs/UsingLibraries.html
+++ b/docs/UsingLibraries.html
@@ -13,8 +13,8 @@
   <li><a href="#descriptions">Library Descriptions</a></li>
   <li><a href="#rot">Linkage Rules Of Thumb</a>
 	  <ol>
-			<li><a href="#always">Always Link vmcore.o, support.a</a>
-			<li><a href="#placeholder">Placeholder</a>
+      <li><a href="#always">Always link LLVMCore, LLVMSupport, LLVMSystem</a>
+			<li><a href="#onlyone">Never link both archive and re-linked</a>
 		</ol>
 	</li>
 </ol>
@@ -72,48 +72,80 @@
 <table style="text-align:left">
   <tr><th>Library</th><th>Forms</th><th>Description</th></tr>
   <tr><th colspan=3">Core Libraries</th></tr>
-  <tr><td>LLVMAsmParser</td><td><tt>.o</tt></td><td>LLVM Assembly Parsing</td></tr>
-  <tr><td>LLVMBCReader</td><td><tt>.o</tt></td><td>LLVM Bytecode Reading</td></tr>
-  <tr><td>LLVMBCWriter</td><td><tt>.o</tt></td><td>LLVM Bytecode Writing</td></tr>
-  <tr><td>LLVMDebugger</td><td><tt>.o</tt></td><td>Source Level Debugging Support</td></tr>
-  <tr><td>LLVMSupport</td><td><tt>.a .o</tt></td><td>General support utilities</td></tr>
-  <tr><td>LLVMSystem</td><td><tt>.a .o</tt></td><td>Operating system abstraction</td></tr>
-  <tr><td>LLVMCore</td><td><tt>.o</tt></td><td>LLVM Core IR</td></tr>
+  <tr><td>LLVMAsmParser</td><td><tt>.o</tt></td>
+    <td>LLVM Assembly Parsing</td></tr>
+  <tr><td>LLVMBCReader</td><td><tt>.o</tt></td>
+    <td>LLVM Bytecode Reading</td></tr>
+  <tr><td>LLVMBCWriter</td><td><tt>.o</tt></td>
+    <td>LLVM Bytecode Writing</td></tr>
+  <tr><td>LLVMDebugger</td><td><tt>.o</tt></td>
+    <td>Source Level Debugging Support</td></tr>
+  <tr><td>LLVMSupport</td><td><tt>.a .o</tt></td>
+    <td>General support utilities</td></tr>
+  <tr><td>LLVMSystem</td><td><tt>.a .o</tt></td>
+    <td>Operating system abstraction</td></tr>
+  <tr><td>LLVMCore</td><td><tt>.o</tt></td>
+    <td>LLVM Core IR</td></tr>
 
   <tr><th colspan=3">Analysis Libraries</th></tr>
-  <tr><td>LLVMAnalysis</td><td><tt>.a .o</tt></td><td>Various analysis passes.</td></tr>
-  <tr><td>LLVMDataStructure</td><td><tt>.a .o</tt></td><td>Data structure analysis passes.</td></tr>
-  <tr><td>LLVMipa</td><td><tt>.a .o</tt></td><td>Inter-procedural analysis passes.</td></tr>
+  <tr><td>LLVMAnalysis</td><td><tt>.a .o</tt></td>
+    <td>Various analysis passes.</td></tr>
+  <tr><td>LLVMDataStructure</td><td><tt>.a .o</tt></td>
+    <td>Data structure analysis passes.</td></tr>
+  <tr><td>LLVMipa</td><td><tt>.a .o</tt></td>
+    <td>Inter-procedural analysis passes.</td></tr>
 
-  <tr><th colspan=3">Transformation Libraries</th>
-  <tr><td>LLVMInstrumentation</td><td><tt>.a .o</tt></td><td>Instrumentation passes.</td></tr>
-  <tr><td>LLVMipo</td><td><tt>.a .o</tt></td><td>All inter-procedural optimization passes.</td></tr>
-  <tr><td>LLVMScalarOpts</td><td><tt>.a .o</tt></td><td>All scalar optimization passes.</td></tr>
-  <tr><td>LLVMTransforms</td><td><tt>.a .o</tt></td><td>Uncategorized transformation passes.</td></tr>
-  <tr><td>LLVMTransformUtils</td><td><tt>.a .o</tt></td><td>Transformation utilities.</td></tr>
-  <tr><td>LLVMProfilePaths</td><td><tt>.o</tt></td><td>Profile paths for instrumentation.</td></tr>
+  <tr><th colspan=3">Transformation Libraries</th></tr>
+  <tr><td>LLVMInstrumentation</td><td><tt>.a .o</tt></td>
+    <td>Instrumentation passes.</td></tr>
+  <tr><td>LLVMipo</td><td><tt>.a .o</tt></td>
+    <td>All inter-procedural optimization passes.</td></tr>
+  <tr><td>LLVMScalarOpts</td><td><tt>.a .o</tt></td>
+    <td>All scalar optimization passes.</td></tr>
+  <tr><td>LLVMTransforms</td><td><tt>.a .o</tt></td>
+    <td>Uncategorized transformation passes.</td></tr>
+  <tr><td>LLVMTransformUtils</td><td><tt>.a .o</tt></td>
+    <td>Transformation utilities.</td></tr>
+  <tr><td>LLVMProfilePaths</td><td><tt>.o</tt></td>
+    <td>Profile paths for instrumentation.</td></tr>
 
   <tr><th colspan=3">Code Generation Libraries </th></tr>
-  <tr><td>LLVMCodeGen</td><td><tt>.o</tt></td><td>Native code generation infrastructure</td></tr>
+  <tr><td>LLVMCodeGen</td><td><tt>.o</tt></td>
+    <td>Native code generation infrastructure</td></tr>
 
   <tr><th colspan=3">Target Libraries</th></tr>
-  <tr><td>LLVMCBackend</td><td><tt>.o</tt></td><td>'C' language code generator.</td></tr>
-  <tr><td>LLVMPowerPC</td><td><tt>.o</tt></td><td>PowerPC code generation backend</td></tr>
-  <tr><td>LLVMSelectionDAG</td><td><tt>.o</tt></td><td>Aggressive instruction selector for Directed Acyclic Graphs.</td></tr>
-  <tr><td>LLVMSkeleton</td><td><tt>.a .o</tt></td><td>Skeleton for a code generation backend.</td></tr>
-  <tr><td>LLVMSparcV9</td><td><tt>.o</tt></td><td>Code generation for SparcV9.</td></tr>
-  <tr><td>LLVMSparcV9RegAlloc</td><td><tt>.a .o</tt></td><td>Graph-coloring register allocator for SparcV9.</td></tr>
-  <tr><td>LLVMSparcV9InstrSched</td><td><tt>.o</tt></td><td>Instruction scheduling for SparcV9.</td></tr>
-  <tr><td>LLVMSparcV9LiveVar</td><td><tt>.o</tt></td><td>Live variable analysis SparcV9.</td></tr>
-  <tr><td>LLVMSparcV9ModuloSched</td><td><tt>.o</tt></td><td>Modulo scheduling for SparcV9.</td></tr>
-  <tr><td>LLVMTarget</td><td><tt>.a .o</tt></td><td>Generic code generation utilities.</td></tr>
-  <tr><td>LLVMX86</td><td><tt>.o</tt></td><td>Intel x86 code generation backend</td></tr>
+  <tr><td>LLVMCBackend</td><td><tt>.o</tt></td>
+    <td>'C' language code generator.</td></tr>
+  <tr><td>LLVMPowerPC</td><td><tt>.o</tt></td>
+    <td>PowerPC code generation backend</td></tr>
+  <tr><td>LLVMSelectionDAG</td><td><tt>.o</tt></td>
+    <td>Aggressive instruction selector for Directed Acyclic Graphs.</td></tr>
+  <tr><td>LLVMSkeleton</td><td><tt>.a .o</tt></td>
+    <td>Skeleton for a code generation backend.</td></tr>
+  <tr><td>LLVMSparcV9</td><td><tt>.o</tt></td>
+    <td>Code generation for SparcV9.</td></tr>
+  <tr><td>LLVMSparcV9RegAlloc</td><td><tt>.a .o</tt></td>
+    <td>Graph-coloring register allocator for SparcV9.</td></tr>
+  <tr><td>LLVMSparcV9InstrSched</td><td><tt>.o</tt></td>
+    <td>Instruction scheduling for SparcV9.</td></tr>
+  <tr><td>LLVMSparcV9LiveVar</td><td><tt>.o</tt></td>
+    <td>Live variable analysis SparcV9.</td></tr>
+  <tr><td>LLVMSparcV9ModuloSched</td><td><tt>.o</tt></td>
+    <td>Modulo scheduling for SparcV9.</td></tr>
+  <tr><td>LLVMTarget</td><td><tt>.a .o</tt></td>
+    <td>Generic code generation utilities.</td></tr>
+  <tr><td>LLVMX86</td><td><tt>.o</tt></td>
+    <td>Intel x86 code generation backend</td></tr>
 
   <tr><th colspan=3">Runtime Libraries</th></tr>
-  <tr><td>LLVMInterpreter</td><td><tt>.o</tt></td><td>Bytecode Interpreter</td></tr>
-  <tr><td>LLVMJIT</td><td><tt>.o</tt></td><td>Bytecode JIT Compiler</td></tr>
-  <tr><td>LLVMExecutionEngine</td><td><tt>.o</tt></td><td>Virtual machine engine</td></tr>
-  <tr><td>LLVMexecve</td><td><tt>.o</tt></td><td>execve(2) replacement for llee</td></tr>
+  <tr><td>LLVMInterpreter</td><td><tt>.o</tt></td>
+    <td>Bytecode Interpreter</td></tr>
+  <tr><td>LLVMJIT</td><td><tt>.o</tt></td>
+    <td>Bytecode JIT Compiler</td></tr>
+  <tr><td>LLVMExecutionEngine</td><td><tt>.o</tt></td>
+    <td>Virtual machine engine</td></tr>
+  <tr><td>LLVMexecve</td><td><tt>.o</tt></td>
+    <td>execve(2) replacement for llee</td></tr>
 </table>
 </div>