For PR1370:
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36587 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/Generic/ispositive.ll b/test/CodeGen/ARM/ispositive.ll
similarity index 65%
rename from test/CodeGen/Generic/ispositive.ll
rename to test/CodeGen/ARM/ispositive.ll
index c158f15..8dcac30 100644
--- a/test/CodeGen/Generic/ispositive.ll
+++ b/test/CodeGen/ARM/ispositive.ll
@@ -1,6 +1,3 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
-; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
-; RUN: grep {srwi r3, r3, 31}
; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
diff --git a/test/CodeGen/Generic/vector-identity-shuffle.ll b/test/CodeGen/Generic/vector-identity-shuffle.ll
index 9cccf4b..0f7e03b 100644
--- a/test/CodeGen/Generic/vector-identity-shuffle.ll
+++ b/test/CodeGen/Generic/vector-identity-shuffle.ll
@@ -1,5 +1,3 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
; RUN: llvm-upgrade < %s | llvm-as | llc
void %test(<4 x float> *%tmp2.i) {
diff --git a/test/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
similarity index 100%
rename from test/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll
rename to test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll
diff --git a/test/CodeGen/Generic/ispositive.ll b/test/CodeGen/PowerPC/ispositive.ll
similarity index 60%
copy from test/CodeGen/Generic/ispositive.ll
copy to test/CodeGen/PowerPC/ispositive.ll
index c158f15..192d738 100644
--- a/test/CodeGen/Generic/ispositive.ll
+++ b/test/CodeGen/PowerPC/ispositive.ll
@@ -1,8 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
; RUN: grep {srwi r3, r3, 31}
-; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
-; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
define i32 @test1(i32 %X) {
entry:
diff --git a/test/CodeGen/PowerPC/vector-identity-shuffle.ll b/test/CodeGen/PowerPC/vector-identity-shuffle.ll
new file mode 100644
index 0000000..af5cc02
--- /dev/null
+++ b/test/CodeGen/PowerPC/vector-identity-shuffle.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep test:
+; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vperm
+
+void %test(<4 x float> *%tmp2.i) {
+ %tmp2.i = load <4x float>* %tmp2.i
+ %xFloat0.48 = extractelement <4 x float> %tmp2.i, uint 0 ; <float> [#uses=1]
+ %inFloat0.49 = insertelement <4 x float> undef, float %xFloat0.48, uint 0 ; <<4 x float>> [#uses=1]
+ %xFloat1.50 = extractelement <4 x float> %tmp2.i, uint 1 ; <float> [#uses=1]
+ %inFloat1.52 = insertelement <4 x float> %inFloat0.49, float %xFloat1.50, uint 1 ; <<4 x float>> [#uses=1]
+ %xFloat2.53 = extractelement <4 x float> %tmp2.i, uint 2 ; <float> [#uses=1]
+ %inFloat2.55 = insertelement <4 x float> %inFloat1.52, float %xFloat2.53, uint 2 ; <<4 x float>> [#uses=1]
+ %xFloat3.56 = extractelement <4 x float> %tmp2.i, uint 3 ; <float> [#uses=1]
+ %inFloat3.58 = insertelement <4 x float> %inFloat2.55, float %xFloat3.56, uint 3 ; <<4 x float>> [#uses=4]
+ store <4 x float> %inFloat3.58, <4x float>* %tmp2.i
+ ret void
+}
diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll
new file mode 100644
index 0000000..3799b9c
--- /dev/null
+++ b/test/CodeGen/X86/ispositive.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31}
+
+define i32 @test1(i32 %X) {
+entry:
+ icmp slt i32 %X, 0 ; <i1>:0 [#uses=1]
+ zext i1 %0 to i32 ; <i32>:1 [#uses=1]
+ ret i32 %1
+}
+