commit 42b7a71dc7381d1f38bf7b7201fc26dd80453364
author Andrew Trick <atrick@apple.com> Tue Jan 17 06:55:03 2012 +0000
committer Andrew Trick <atrick@apple.com> Tue Jan 17 06:55:03 2012 +0000
tree aac48cd86f79e0ba5824772715f6605829ce117e
parent c1b1c7b205589c9a081e1cbd33fb56506fc287b3

Renamed MachineScheduler to ScheduleTopDownLive.

Responding to code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148290 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/RegAllocGreedy.cpp

diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index 16832ce..9fd444f 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -316,7 +316,7 @@
   initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
   initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
   initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
-  initializeMachineSchedulerPassPass(*PassRegistry::getPassRegistry());
+  initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
   initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
   initializeLiveStacksPass(*PassRegistry::getPassRegistry());
   initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
@@ -339,7 +339,7 @@
     AU.addRequiredID(StrongPHIEliminationID);
   AU.addRequiredTransitiveID(RegisterCoalescerPassID);
   if (EnableMachineSched)
-    AU.addRequiredID(MachineSchedulerPassID);
+    AU.addRequiredID(MachineSchedulerID);
   AU.addRequired<CalculateSpillWeights>();
   AU.addRequired<LiveStacks>();
   AU.addPreserved<LiveStacks>();