Fix emission of instructions that directly reference MBBs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7771 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/InstrSelectorEmitter.cpp b/utils/TableGen/InstrSelectorEmitter.cpp
index 9bc50ce..28c7de1 100644
--- a/utils/TableGen/InstrSelectorEmitter.cpp
+++ b/utils/TableGen/InstrSelectorEmitter.cpp
@@ -1205,15 +1205,21 @@
if (P->getResult()) OS << ", NewReg";
OS << ")";
- for (unsigned i = 0, e = Operands.size(); i != e; ++i)
- if (Operands[i].first->isLeaf()) {
- Record *RV = Operands[i].first->getValueRecord();
+ for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
+ TreePatternNode *Op = Operands[i].first;
+ if (Op->isLeaf()) {
+ Record *RV = Op->getValueRecord();
assert(RV->isSubClassOf("RegisterClass") &&
"Only handles registers here so far!");
OS << ".addReg(" << Operands[i].second << "->Val)";
- } else {
+ } else if (Op->getOperator()->getName() == "imm") {
OS << ".addZImm(" << Operands[i].second << "->Val)";
+ } else if (Op->getOperator()->getName() == "basicblock") {
+ OS << ".addMBB(" << Operands[i].second << "->Val)";
+ } else {
+ assert(0 && "Unknown value type!");
}
+ }
OS << ";\n";
break;
case Pattern::Expander: {