commit 439b444cad649fb24d59fb02685e525afee82f71
author Nate Begeman <natebegeman@mac.com> Tue Apr 05 04:22:58 2005 +0000
committer Nate Begeman <natebegeman@mac.com> Tue Apr 05 04:22:58 2005 +0000
tree aab68621302be8a2df678cd6ea3c01f04cb80eca
parent bd135c77060bd2213c4a8021379ab16fa0925af1

Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better
  indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
  can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC32ISelSimple.cpp

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 78d1688..80c554c 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -1585,11 +1585,11 @@
       .addImm(0);
     if (BI.getSuccessor(1) == NextBB) {
       if (BI.getSuccessor(0) != NextBB)
-        BuildMI(BB, PPC::COND_BRANCH, 3).addReg(PPC::CR0).addImm(PPC::BNE)
+        BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(PPC::BNE)
           .addMBB(MBBMap[BI.getSuccessor(0)])
           .addMBB(MBBMap[BI.getSuccessor(1)]);
     } else {
-      BuildMI(BB, PPC::COND_BRANCH, 3).addReg(PPC::CR0).addImm(PPC::BEQ)
+      BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(PPC::BEQ)
         .addMBB(MBBMap[BI.getSuccessor(1)])
         .addMBB(MBBMap[BI.getSuccessor(0)]);
       if (BI.getSuccessor(0) != NextBB)
@@ -1604,7 +1604,7 @@
   OpNum = EmitComparison(OpNum, SCI->getOperand(0), SCI->getOperand(1), BB,MII);
   
   if (BI.getSuccessor(0) != NextBB) {
-    BuildMI(BB, PPC::COND_BRANCH, 3).addReg(PPC::CR0).addImm(Opcode)
+    BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(Opcode)
       .addMBB(MBBMap[BI.getSuccessor(0)])
       .addMBB(MBBMap[BI.getSuccessor(1)]);
     if (BI.getSuccessor(1) != NextBB)
@@ -1613,7 +1613,7 @@
     // Change to the inverse condition...
     if (BI.getSuccessor(1) != NextBB) {
       Opcode = PPC32InstrInfo::invertPPCBranchOpcode(Opcode);
-      BuildMI(BB, PPC::COND_BRANCH, 3).addReg(PPC::CR0).addImm(Opcode)
+      BuildMI(BB, PPC::COND_BRANCH, 4).addReg(PPC::CR0).addImm(Opcode)
         .addMBB(MBBMap[BI.getSuccessor(1)])
         .addMBB(MBBMap[BI.getSuccessor(0)]);
     }